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Array substrate and display panel

An array substrate and pad technology, which is applied in the field of array substrates and display panels, can solve the problems of abnormal display and short circuit of conductive particles of conductive adhesive, and achieve the effects of avoiding short circuit, increasing height difference and improving product yield.

Active Publication Date: 2020-11-27
WUHAN CHINA STAR OPTOELECTRONICS TECH CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0006] The present invention provides an array substrate and a display panel, which can solve the problem that the conductive particles of the conductive glue above the spaced lines are also pressed and short-circuited due to the gap between the spaced lines and the pads when the binding alignment is offset. , a technical issue causing the display exception

Method used

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  • Array substrate and display panel
  • Array substrate and display panel

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0037] see Figure 7 , Figure 8 As shown, in Embodiment 1 of the present invention, an array substrate 100 is provided, which is provided with a binding area, and the binding area includes a substrate layer 1, a first metal layer 2, and an interlayer insulating layer stacked in sequence from bottom to top. 3. The second metal layer 4 , the passivation layer 5 and the conductive layer 6 .

[0038]Specifically, the first metal layer 2 is disposed on the substrate layer 1, and is provided with a plurality of pad bottoms 21 arranged at intervals; the interlayer insulating layer 3 is disposed on the first metal layer 2 , a plurality of grooves 31 and a plurality of via holes 32 are provided; the grooves 31 are correspondingly provided between two adjacent pad bottoms 21; the via holes 32 are provided correspondingly to the pad bottoms 21; the The second metal layer 4 is disposed on the interlayer insulating layer 3, and is provided with a plurality of spaced wires 41 and a line ...

Embodiment 2

[0049] see Figure 9 , Figure 10 As shown, in embodiment 2, most of the technical features in embodiment 1 are included. The difference is that in embodiment 2, a plurality of grooves 31 are provided between two adjacent pad bottoms 21, each One spacing wire 41 is disposed in the groove 31 . In Embodiment 1, one groove 31 is not provided between two adjacent pad bottoms 21 .

[0050] In this embodiment, two spaced traces 41 are set between two adjacent pad bottoms 21, and two grooves 31 are correspondingly set between two adjacent pad bottoms 21. The distance between the two grooves 31 is 3.5um-4.5um, preferably 4um.

Embodiment 3

[0052] In Embodiment 3, accommodating grooves (not shown) may be further provided on the substrate layer 1 corresponding to the positions of the grooves 31, so as to further increase the height of the spaced traces 41 and the pads used for bonding. Poor, avoiding the conductive particles in the bonding conductive adhesive being pressed on the spacer wiring 41 when the bonding is misplaced, and causing a short circuit in the interconnection, which improves the product yield.

[0053] The present invention also provides a display panel, including the above-mentioned array substrate 100 .

[0054] Compared with the prior art, the beneficial effect of the display panel provided by the embodiment of the present invention is the same as the beneficial effect of the array substrate 100 provided by the above technical solution, which will not be repeated here.

[0055] Wherein, the display panel provided in the above embodiments may be any product or component with a display function,...

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Abstract

The invention discloses an array substrate and a display panel. The array substrate is provided with a binding area; the binding area comprises a substrate layer, a first metal layer, an interlayer insulating layer, a second metal layer, a passivation layer and a conductive layer which are sequentially arranged in a stacked mode from bottom to top. The interlayer insulating layer is provided witha plurality of grooves and a plurality of via holes; the second metal layer is provided with a plurality of interval wires and a wire changing part, and the interval wires are arranged in the groove.According to the array substrate disclosed in the invention, the grooves are formed in the interlayer insulating layers corresponding to the interval wiring positions, the grooves are formed in the conductive adhesive, and the interval wires are arranged in the grooves, so that the height difference between the interval wires and the bonding pads for binding is increased, short circuit caused by mutual connection due to the fact that conductive particles in the bound conductive adhesive are pressed on the interval wires during binding dislocation is prevented, and the product yield is improved.

Description

technical field [0001] The present application relates to the field of display technology, in particular to an array substrate and a display panel. Background technique [0002] In the manufacturing process of liquid crystal display (LCD), after the array substrate and color film substrate (T / C) are laminated and cut into small-sized display screens, integrated circuit chips (IC) and flexible circuit boards (FPC), etc. Bind to the display for subsequent signal input or processing. [0003] Such as figure 1 , figure 2 as shown, figure 1 It is a structural schematic diagram after binding integrated circuit chips and flexible circuit boards on the existing array substrate. figure 2 for figure 1 Cross-sectional view of an integrated circuit chip-bonded conduction in . On the array substrate 90, pads 91 (Pad) for bonding will be formed in the front-end substrate manufacturing process. When bonding the integrated circuit chip 92 or the flexible circuit board 93, first past...

Claims

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Application Information

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IPC IPC(8): H01L27/12G02F1/1339G02F1/1345
CPCH01L27/1244G02F1/13458G02F1/1339
Inventor 唐维曹志浩
Owner WUHAN CHINA STAR OPTOELECTRONICS TECH CO LTD
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