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Alignment detection method in wafer bonding process

A detection method and wafer bonding technology, which are used in precision positioning equipment, microstructure technology, microstructure devices, etc., can solve the problems of inability to real-time monitoring and the qualified rate of waste wafers, so as to reduce the structural deviation and reduce the waste wafer rate. Effect

Active Publication Date: 2021-01-01
BEIJING INST OF AEROSPACE CONTROL DEVICES
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  • Description
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  • Application Information

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Problems solved by technology

After the bonding alignment is fixed, for some special wafers, since the upper wafer is an opaque wafer, real-time monitoring of the alignment deviation cannot be carried out through an optical microscope or an infrared microscope after alignment, resulting in alignment deviations after bonding that deviate from the required range , resulting in waste or low pass rate, in order to monitor the process, it is urgent to provide a new bonding alignment detection method to solve the above problems

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  • Alignment detection method in wafer bonding process
  • Alignment detection method in wafer bonding process
  • Alignment detection method in wafer bonding process

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Embodiment

[0040] This embodiment provides a method for alignment detection during wafer bonding, the method comprising the following steps:

[0041] 1) The upper wafer alignment unit includes an upper wafer auxiliary alignment mark and an upper wafer main alignment mark; wherein, the upper wafer auxiliary alignment mark and the upper wafer main alignment mark are located on the upper wafer non-bonding surface; the upper wafer auxiliary alignment mark The mark is set at 1000-2000 μm above the lower boundary, and the main alignment mark of the upper wafer is set at the center of the wafer;

[0042] 2) The lower wafer alignment unit includes a lower wafer auxiliary alignment mark and a lower wafer main alignment mark; wherein, the lower wafer auxiliary alignment mark and the lower wafer main alignment mark are located on the lower wafer bonding surface; the lower wafer auxiliary alignment mark It is set at 1000-2000 μm above the lower boundary, and the main alignment mark of the lower wafe...

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Abstract

The invention discloses an alignment detection method in a wafer bonding process. The alignment detection method comprises the following steps: manufacturing an upper wafer auxiliary alignment mark and an upper wafer main alignment mark on the non-bonding surface of an upper wafer; manufacturing a lower wafer auxiliary alignment mark and a lower wafer main alignment mark on a bonding surface of alower wafer ; aligning the upper wafer with the lower wafer through the main alignment marks so that the upper wafer and the lower wafer after are staggered to expose the lower wafer auxiliary alignment mark, measuring the transverse and longitudinal position deviation of the exposed lower wafer auxiliary alignment mark and the upper wafer auxiliary alignment mark, calculating the alignment mark deviation, and reasonably controlling an alignment deviation range. According to the method, sensitive chips with high alignment precision can be processed, a quantitative test of the alignment of thenon-transparent wafers before bonding is realized, and the quality and the yield of the chip can be ensured.

Description

technical field [0001] The invention belongs to the technical field of MEMS chip manufacturing, and in particular relates to an alignment detection method in a wafer bonding process. Background technique [0002] MEMS sensors have been widely used in many fields such as national defense, inertial navigation, earthquake detection, industry, medical treatment, automation, and consumer electronics due to their low cost, small size, low power consumption, and mass production. [0003] Bonding has a wide range of applications in micromachining. It can permanently join the same or different substrates, the same or different components, and substrates and components. Among them, wafer bonding technology is a key technology in the field of MEMS, which can realize the stacking connection of multi-layer wafers with different functions, and is widely used in the fields of MEMS sensors, SOI devices, power electronic devices and vacuum microelectronic devices. As the device size decrea...

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): B81C99/00B81C3/00
CPCB81C99/004B81C3/004Y02P70/50
Inventor 刘福民刘宇张乐民刘国文马骁崔尉梁德春张树伟吴浩越杨静李兆涵徐宇新
Owner BEIJING INST OF AEROSPACE CONTROL DEVICES