Memristor-based low-power-consumption pulse convolutional neural network hardware architecture
A technology of convolutional neural network and hardware architecture, which is applied in the field of hardware architecture of low-power pulsed convolutional neural network, can solve problems such as gaps in recognition effects, lack of efficient training algorithms for pulsed convolutional neural networks, and insufficient understanding. To achieve the effect of reducing power consumption
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[0022] The technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only some of the embodiments of the present invention, not all of them. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art without making creative efforts belong to the protection scope of the present invention.
[0023] Embodiments of the present invention provide a hardware architecture of a memristor-based low-power pulse convolutional neural network, such as figure 1 As shown, it mainly includes: input buffer (INPUT buffer), memristor control module (RRAM control module), memristor array (RRAM array), sense amplifier (SA) module, and output buffer (OUTPUT buffer device); the input buffer is used to store the image input data, and output the decoding bus ...
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