Computer FPGA reconstruction system based on dual-core ARM SoC and operation method

A technology for reconstructing systems and operating methods, which is applied in computing, code reconstruction, error detection of redundant codes, etc. It can solve problems such as the inability to update and upgrade the FPGA software, and the computer cannot be independently controlled to achieve high maintainability. , Reduce device cost and reduce power consumption

Active Publication Date: 2021-01-15
XIAN MICROELECTRONICS TECH INST
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Problems solved by technology

[0004] The purpose of the present invention is to solve the problem that the missile-borne weapon control computer in the above-mentioned prior art cannot be independently controlled and cannot realize the update and upgrade of the FPGA software under the e

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  • Computer FPGA reconstruction system based on dual-core ARM SoC and operation method
  • Computer FPGA reconstruction system based on dual-core ARM SoC and operation method
  • Computer FPGA reconstruction system based on dual-core ARM SoC and operation method

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[0038] The present invention will be further described in detail below in conjunction with the accompanying drawings and embodiments.

[0039] The reconstruction system of the present invention is a localized computer developed based on the LSoCAM0201 dual-core ARM SoC, wherein FPGA selects SMQ4VLX25FF668, DDR3 RAM selects 3 slices of SM41J128M16M, and the chip single-chip capacity is 128M×16bit (4Mbit), and FLASH selects 1 slice of SPI FLASH SM25P64, single chip capacity is 64Mbit, different codes of ARM SoC and FPGA can be stored in different sectors of FLASH. In addition, the computer also includes a redundant 1553B communication bus, and the communication between peripherals and the computer is realized through the 1553B communication interface.

[0040](1) LSoCAM0201 is a dual-core ARM SoC circuit for missile weapon control system and information processing system applications. The chip uses a dual-core CPU Cortex A9 as the main processor, and each core also includes a S...

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Abstract

The invention discloses a computer FPGA reconstruction system based on a dual-core ARM SoC and an operation method; the system comprises the dual-core ARM SoC and an FPGA, and the FPGA comprises an input switching value acquisition logic module, an output switching value control logic module, an interrupt processing logic module, an AD intelligent acquisition module, a clock output module, a telemetry UART module and a CAN core module; an EMIF bus, a UART bus and an FPGA reconstruction configuration pin are connected between the dual-core ARM SoC and the FPGA; the dual-core ARM SoC is connected with the DDR3 RAM and the FLASH, and communication between peripheral equipment and a computer is achieved through a 1553B communication interface. The invention further provides an operation methodof the system. According to the invention, autonomous controllability of the device can be realized, the test process is simplified, and online upgrading of the FPGA program can be realized.

Description

technical field [0001] The invention belongs to the field of integrated circuit design, and in particular relates to a dual-core ARM SoC computer FPGA reconfiguration system and an operation method. Background technique [0002] With the upgrade of various missile weapon systems in terms of range, maneuverability, combat deployment capability, and function changeability, missiles generally have higher and higher requirements for the miniaturization, localization, and high maintainability of the control system. In previous designs, computer circuits built with imported components could not meet the development trend of localization of missile systems due to the great restrictions on components due to the embargo or sanctions. The localized computer based on dual-core ARM SoC is adopted, and all the components in the computer are realized by domestic components, so as to satisfy the independent controllability of the product and avoid being affected by various unstable factors...

Claims

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Application Information

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IPC IPC(8): G06F8/65G06F8/71G06F8/72G06F11/10
CPCG06F8/65G06F8/71G06F8/72G06F11/1004Y02D10/00
Inventor 赵亚玲刘星
Owner XIAN MICROELECTRONICS TECH INST
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