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Metal contact structure of two-dimensional semiconductor material and preparation method thereof

A two-dimensional semiconductor and metal contact technology, applied in semiconductor/solid-state device manufacturing, semiconductor devices, electrical components, etc., can solve the problems that are not conducive to improving the electrical performance of devices, hindering charge injection and output, and lattice damage of two-dimensional materials, etc. problems, to alleviate the charge congestion effect, improve the switching ratio, and increase the contact area.

Pending Publication Date: 2021-03-09
FUDAN UNIV
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

This van der Waals gap will act as a potential barrier for electrons / holes, hindering the injection and output of charges, thereby forming a large contact resistance, which is not conducive to the improvement of device performance.
In addition, when the metal is directly deposited on the surface of the two-dimensional material, it is easy to cause damage to the lattice of the two-dimensional material, thereby introducing interface states and defect states, resulting in a Fermi level pinning effect, which is not conducive to improving the electrical performance of the device.

Method used

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  • Metal contact structure of two-dimensional semiconductor material and preparation method thereof
  • Metal contact structure of two-dimensional semiconductor material and preparation method thereof
  • Metal contact structure of two-dimensional semiconductor material and preparation method thereof

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Embodiment Construction

[0027] Embodiments of the present invention are described in detail below, examples of which are shown in the drawings, wherein the same or similar reference numerals designate the same or similar materials or methods having the same or similar functions throughout. The embodiments described below by referring to the figures are exemplary only for explaining the present invention and should not be construed as limiting the present invention. To simplify the disclosure of the present invention, the materials and methods of specific examples are described below. Of course, they are only examples and are not intended to limit the invention. In addition, various specific process and material examples are provided herein, but one of ordinary skill in the art will recognize the applicability of other processes and / or the use of other materials.

[0028] Hereinafter, an example of a metal contact structure of a two-dimensional semiconductor material and a manufacturing method thereo...

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Abstract

The invention belongs to the technical field of semiconductor devices, and particularly relates to a metal contact structure of a two-dimensional semiconductor material and a preparation method of themetal contact structure. The structure comprises a substrate, a dielectric layer located on the substrate, a common metal electrode, a tooth-shaped metal electrode, a top metal electrode and a two-dimensional semiconductor material located on the dielectric layer. The common metal electrode is connected with the tooth-shaped metal electrode, the tooth-shaped metal electrode is in contact with theedge of the two-dimensional semiconductor material, and the top metal electrode is located above the tooth-shaped metal electrode. Two-dimensional materials have been researched in quantity, but theproblem of electrical contact of metal two-dimensional semiconductor materials is not well solved at present, and the problems of interface lattice damage and ohmic contact of the metal two-dimensional semiconductor materials are solved by adopting a configuration of edge contact and partial top contact; and the structure can be applied to large-scale integrated circuits.

Description

technical field [0001] The invention belongs to the technical field of semiconductor devices, and in particular relates to a metal contact structure of a two-dimensional semiconductor material and a preparation method thereof. Background technique [0002] Since the invention of the integrated circuit, its development has been rapid and the technology has been continuously iterated. The feature size of devices based on semiconductor silicon has been gradually reduced in accordance with "Moore's Law" to achieve the maximum number of devices per unit area, while reducing chip production costs. , maintaining the advantages of high performance and low power consumption. However, when the feature size of the device is reduced to sub-10 nanometers, problems such as short-channel effects, quantum effects, and reduced switching frequencies become more and more serious. Two-dimensional semiconductor materials can effectively avoid the above problems. Its good mechanical properties, ...

Claims

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Application Information

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IPC IPC(8): H01L29/417H01L29/45H01L21/44H01L29/24
CPCH01L29/41758H01L29/45H01L21/44H01L29/24
Inventor 童领包文中马静怡郭晓娇陈新宇夏银周鹏张卫
Owner FUDAN UNIV
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