Three-dimensional memory, circuit chip and preparation method thereof
A technology of circuit chips and MOS devices, which is applied in the direction of circuits, electrical components, semiconductor devices, etc., can solve the problem that circuit chips cannot be further reduced in size, and achieve the effect of improving body effect, high input impedance, and reducing size
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[0028]Next, the technical solutions in the embodiments of the present invention will be apparent from the embodiment of the present invention, and it is clearly described, and it is understood that the described embodiments are merely embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, those of ordinary skill in the art will belong to the scope of the present invention without all other embodiments obtained without creative labor.
[0029]The preparation method of the conventional circuit chip is briefly described before describing the specific embodiment of the present invention.
[0030]Seefigure 1 The preparation method of the conventional circuit chip is: forming the MOS device 50 on the substrate 10, and the adjacent MOS device 50 is interleaned by the shallow trench isolation structure (STI) 20, shallow in the X direction and the Y direction. The p-type field implant is injected into the trench isolation structure (STI...
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