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Substrate preparation method, substrate structure, chip packaging method and chip packaging structure

A technology for substrate preparation and chip packaging, which is applied in semiconductor/solid-state device manufacturing, semiconductor/solid-state device components, semiconductor devices, etc., can solve the problem of easily damaged chip conductive lines, affecting the yield of chip packaging structure, and difficulty in opening depth. control issues

Active Publication Date: 2021-05-14
广东佛智芯微电子技术研究有限公司
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

During the opening process, the depth of the opening is not easy to control, and it is easy to damage the chip or break down other conductive lines, which affects the yield of the chip packaging structure

Method used

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  • Substrate preparation method, substrate structure, chip packaging method and chip packaging structure
  • Substrate preparation method, substrate structure, chip packaging method and chip packaging structure
  • Substrate preparation method, substrate structure, chip packaging method and chip packaging structure

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0082] The chip packaging method of this embodiment includes the following steps:

[0083] S10. Prepare the first sub-substrate:

[0084] S10a, providing a first glass substrate 11, pasting a first photosensitive dry film on one side of the first glass substrate 11, forming several windows after exposure and development;

[0085] S10b, opening a TGV through hole 12 for the first glass substrate 11 in the window, refer to figure 1 ;

[0086] S10c, making the conductive column 13 in the TGV through hole 12, and making one end surface of the conductive column 13 flush with the surface of the first glass substrate 11, and making the other end surface of the conductive column 13 protrude from the first glass substrate 11 forming the boss, refer to figure 2 ;

[0087] S10d, removing the remaining first photosensitive dry film.

[0088] S20. Prepare the second sub-substrate:

[0089] S20a, provide the second glass substrate 21 with the same thickness as the length of the boss,...

Embodiment 2

[0120] The chip packaging method of this embodiment is basically the same as that of the first embodiment above (for the drawings, refer to the drawings in the first embodiment above, and the same components use the same reference numerals), the difference lies in step S20a and step S30:

[0121] S20a, provide the second glass substrate 21, design the opening area of ​​the circuit groove 22 and the opening position of the via hole 23 in the circuit groove 22 according to the position of the circuit of the first redistribution layer 24 and the conductive column 13, and then carry out laser focus modification After modification, ammonium bifluoride solution is used for soaking to etch the laser focus modification area, so that a circuit groove 22 is opened on the side of the second glass substrate 21 and a line groove through the second glass is opened in the circuit groove 22. The via hole 23 of the substrate 21 .

[0122] S30. Attaching the first sub-substrate to the second su...

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Abstract

The invention discloses a substrate preparation method, a substrate structure, a chip packaging method and a chip packaging structure, and the method comprises the steps that a first glass substrate is provided, a plurality of conductive columns are embedded in the first glass substrate, one end of each conductive column is flush with the surface of the first glass substrate, the other end of each conductive column protrudes out of the first glass substrate to form a boss, thereby obtaining a first sub-substrate; a second glass substrate with the thickness equal to the length of the boss is provided, a circuit groove is formed in one side of the second glass substrate, a plurality of via holes are formed in the circuit groove, a first rewiring layer is manufactured in the circuit groove, the via holes are made to be through holes, and a second sub-substrate is manufactured; the first sub-substrate and the second sub-substrate are attached, so that the bosses are embedded into the via holes, and the end faces of the bosses are flush with the surface of the second glass substrate. The circuit interconnection stability of the substrate structure prepared by the method is good, the chip is convenient to mount, the substrate structure can be prevented from being perforated to prepare the conductive column after the chip is mounted, the warping phenomenon generated during chip packaging can be effectively reduced, and the product yield is improved.

Description

technical field [0001] The invention relates to the technical field of integrated circuits, in particular to a substrate preparation method and a substrate structure, a chip packaging method and a chip packaging structure. Background technique [0002] With the trend of miniaturization and integration of electronic products, the high density of microelectronic packaging technology has gradually become the mainstream in the new generation of electronic products. In order to comply with the development of the new generation of electronic products, especially the development of mobile phones, notebooks, smart wearable devices and other products, chips are developing in the direction of higher density, faster speed, smaller size and lower cost. [0003] During the packaging process, due to the difference in thermal expansion coefficients of materials such as plastic, silicon, and metal, the volume changes of these materials are not synchronized, resulting in stress and warpage. ...

Claims

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Application Information

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IPC IPC(8): H01L21/48H01L23/498
CPCH01L21/486H01L21/4857H01L23/49822H01L23/49833H01L23/49827H01L23/49838H01L2224/02331H01L2224/02381H01L2224/02379H01L2224/02333
Inventor 杨斌罗绍根
Owner 广东佛智芯微电子技术研究有限公司
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