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Operating method of an electrically erasable programmable read only memory (EEPROM) cell

A technology of read-only memory and operation method, which can be used in read-only memory, static memory, information storage, etc., and can solve the problems of increased area and increased process complexity.

Pending Publication Date: 2021-06-01
YIELD MICROELECTRONICS CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

For the current non-volatile memory, a high voltage difference is required when erasing, which will increase the area and increase the complexity of the process

Method used

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  • Operating method of an electrically erasable programmable read only memory (EEPROM) cell
  • Operating method of an electrically erasable programmable read only memory (EEPROM) cell
  • Operating method of an electrically erasable programmable read only memory (EEPROM) cell

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Embodiment Construction

[0025] The present invention mainly provides an operation method of a charged erasable programmable read-only memory, which is applied to an erasable programmable read-only memory. The electric field between the transistor or the substrate and the gate is used to reduce the voltage difference between writing and erasing. By the operation method of the present invention, the operating voltage is applied to the gates, sources and drains connected to all memory cells at the same time. The condition that the source or the drain is set as a floating connection during operation is used to achieve the effect of fast writing and fast erasing of a large number of memory cells.

[0026] like Figure 1a and Figure 1b As shown, the charged erasable programmable read-only memory proposed by the present invention mainly includes: a semiconductor substrate 10, and at least one transistor structure is formed on the semiconductor substrate 10, and the transistor structure 12 includes a first ...

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Abstract

An operating method of an EEPROM cell is provided. The EEPROM cell comprises a transistor structure disposed on a semiconductor substrate and the transistor structure comprises a first electric-conduction gate. The-same-type ions are implanted into the semiconductor substrate between an interface of its source, drain and the first electric-conduction gate, or into the ion doped regions of the source and the drain, so as to increase ion concentrations in the implanted regions and reduce voltage difference in writing and erasing operations. The operating method of the EEPROM cell provides an operating condition that the drain or the source is set as floating during operations, to achieve the objective of rapid writing and erasing of a large number of memory cells. The proposed operating method is also applicable to the EEPROM cell having a floating gate structure in addition to a single gate transistor structure.

Description

technical field [0001] The invention relates to a charge erasable programmable read-only memory technology, in particular to a fast writing and erasing operation method of the charge erasable programmable read-only memory. Background technique [0002] Nowadays, with the development of computer information products, electronically erasable programmable read-only memory (Electrically Erasable Programmable Read Only Memory, EEPROM) and non-volatile memory such as flash memory (Flash) are semiconductors that can be programmed multiple times electronically. Storage devices only need a specific voltage to erase the data in the memory in order to write new data, and the data will not disappear after the power is turned off, so it is widely used in various electronic products. [0003] Since the non-volatile memory is programmable, it uses stored charge to change the gate voltage of the transistor of the memory, or does not store charge to leave the gate voltage of the transistor o...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L27/11521H01L29/788H10B41/30
CPCH01L29/788H10B41/30G11C16/0416G11C16/0441G11C16/10G11C16/14H10B41/60G11C16/0433H01L29/0847
Inventor 吴政颖钟承谕黄文谦
Owner YIELD MICROELECTRONICS CORP
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