CMOS image sensor and manufacturing method thereof
A technology of an image sensor and a manufacturing method, applied in the field of optics, capable of solving problems such as photosensitive diode photosensitive sensitivity and full-well capacity deterioration, and achieving the effects of increased pixel density, high full-well capacity, and high energy utilization
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Embodiment 1
[0107] A kind of manufacturing method of CMOS image sensor is provided in this embodiment, please refer to figure 1 , shown as a process flow diagram of the method, comprising the following steps:
[0108] S1: providing a matrix layer;
[0109] S2: forming a photosensitive unit in the matrix layer, the photosensitive unit includes a transparent electrode layer, a photosensitive layer and a metal electrode layer arranged in sequence in the horizontal direction.
[0110] See first figure 2 and image 3 , performing the step S1: providing a matrix layer 101 .
[0111] As an example, a readout circuit is fabricated first, and then the matrix layer 101 is formed on the readout circuit. In this embodiment, the readout circuit includes a substrate layer 102, a readout circuit active region 103 located in the substrate layer 102, and an interconnection layer located on the substrate layer 102, and the interconnection layer includes layers Interlayer 104 and metal interconnection...
Embodiment 2
[0134] This embodiment provides a method for fabricating a CMOS image sensor, which performs basically the same steps as in Embodiment 1, the difference being that in Embodiment 1, the photosensitive unit is used as a component of the pixel structure, while in this embodiment, the photosensitive The cells act as part of the isolation structure between the pixel structures.
[0135] See first Figure 13 , performing the step S1: providing a matrix layer 201 .
[0136] As an example, the host layer 201 may be a silicon substrate, a germanium substrate, a silicon-on-insulator substrate, a III-V compound substrate or other suitable semiconductor substrates, which may be P-type doped or N-type doped. miscellaneous.
[0137] As an example, the matrix layer 201 is provided with a plurality of photodiodes arranged at intervals in the horizontal direction. In this embodiment, the plurality of photodiodes include a first photodiode 202a, a second photodiode 202b and a third photodiod...
Embodiment 3
[0154] A CMOS image sensor is provided in this embodiment, please refer to Figure 12 , which is a schematic structural diagram of the CMOS image sensor, including a matrix layer (not shown) and a photosensitive unit, the photosensitive unit is located in the matrix layer, and the photosensitive unit includes transparent electrode layers 108 arranged in sequence in the horizontal direction , photosensitive layer and metal electrode layer 110 .
[0155] As an example, the photosensitive unit includes an optical thinning medium layer 109, the transparent electrode layer 108 surrounds the optical thinning medium layer 109, the photosensitive layer surrounds the transparent electrode layer 108, and the metal electrode layer 110 surrounds the photosensitive layer.
[0156] As an example, the CMOS image sensor includes a plurality of photosensitive units, and the metal electrode layers 110 of two adjacent photosensitive units are connected.
[0157] As an example, the CMOS image s...
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Abstract
Description
Claims
Application Information
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