Lateral double-diffused transistor and manufacturing method thereof

Abstract

The invention relates to the technical field of semiconductors, and provides a lateral double-diffused transistor and a manufacturing method thereof. The LDMOS device comprises a first epitaxial layer and a second epitaxial layer which are arranged on a substrate; the two trench gate structures are arranged in the second epitaxy along the first direction and are distributed at an interval; a first drift region and a drain end region on one side of the trench gate structure on the second epitaxial layer are defined along a second direction, and a source end region on the other side of the trench gate structure is defined; a plane gate structure is arranged on the second epitaxial layer between the two trench gate structures along the first direction; a drain injection region is arranged in the drain end region; and a source injection region is arranged in the source end region; and the metal contacts on the drain injection region, the source injection region and the gate structure are respectively and correspondingly led out to a drain electrode, a source electrode and a gate electrode. Therefore, the withstand voltage of the LDMOS device can be effectively improved, and the on-resistance of the LDMOS device is reduced.

Description

technical field [0001] The present disclosure relates to the technical field of semiconductors, in particular to a lateral double-diffused transistor and a manufacturing method thereof. Background technique [0002] Laterally Diffused Metal Oxide Semiconductor (LDMOS) devices are unipolar multisub devices, which have the advantages of good turn-off characteristics, high input impedance, and easy large-scale integration, and have been widely used in many fields. application. [0003] Breakdown voltage and on-resistance are two main parameters that must be considered in designing power LDMOS devices. If the breakdown voltage is increased, the on-resistance will also increase, resulting in an increase in on-state power consumption. Since there is an irreconcilable contradiction between the on-resistance and the breakdown voltage, in practical applications, it is necessary to limit the on-resistance of the power LDMOS device. [0004] One of the most important goals in the op...

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Problems solved by technology

[0006] For LDMOS that meets the RESURF condition, the withstand voltage characteristics of the device have been improved, but there is still a proportional relationship between the on-resistance and the breakdown voltage of 2.5 power

Therefore, high on-resistance limits the application of LDMOS devices in high-voltage fields

[0007] In the traditional double resurf structure, although the uniform P drop layer (ptop) can assist in the depletion of the drift region, it can have a larger doping concentration and lower conduction under the same withstand voltage condition. resistance, but its boost performance is limited

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