Memory based on spin texture, and preparation method thereof

Abstract

The invention relates to a memory based on spin texture. The memory comprises a substrate, a ferroelectric layer and a ferromagnetic layer; the ferroelectric layer is located on the substrate; the ferromagnetic layer is located on the ferroelectric layer; and the material of the substrate is a conductive material, the material of the ferroelectric layer is GeTe, SnTe or HfO2, and the material of the ferromagnetic layer is a material which conducts electrons and has spin polarization. The memory disclosed by the invention has the advantages of low power consumption, small size, high-density integration, simple structural design, high read-write speed and compatibility with a CMOS process. The invention also relates to a preparation method of the memory based on the spin texture.

Description

technical field [0001] The invention belongs to the field of memory technology, and in particular relates to a memory based on spin texture and a preparation method thereof. Background technique [0002] More than half a century has passed since the invention of memory. With the rise and rapid development of new information technologies such as artificial intelligence, the Internet of Things, and big data, the amount of data is growing explosively, and the demand for data storage and processing speed is also increasing. getting stronger. Therefore, the bottleneck problem of storage is becoming more and more prominent in the development of modern information society. In order to solve this problem, the current main technical solutions include magnetic field writing MRAM based on spintronics and SOT- and STT-MRAM based on spin interaction. FRAM based on electrical materials, PRAM based on material phase change and RRAM based on resistive switching effect. [0003] MRAM: Its ...

AI Technical Summary

Problems solved by technology

But at the same time, these new principle devices also have some inherent shortcomings, which limit their further development.

For example, in FRAM, the ferroelectric material preparation process is poorly compatible with CMOS, and at the same time it cannot be further reduced in size, and cannot meet high-density integration; the process of MRAM is complicated, and the information writing speed is limited.

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