Semiconductor structure and forming method thereof

Abstract

The invention discloses a semiconductor structure and a forming method thereof, and the method comprises the steps that a substrate which comprises a first region and a second region is provided, wherein the first region is provided with a fin structure, the second region is provided with a fin structure, and the fin structure comprises a plurality of composite fin layers which are stacked in the normal direction of the surface of the substrate; a dielectric layer is formed on the substrate, wherein the dielectric layer is internally provided with a first pseudo gate opening and a second pseudo gate opening; after a dielectric layer and a first pseudo gate opening and a second pseudo gate opening located in the dielectric layer are formed, a first improvement layer is formed on the top surface and the side wall surface of the fin structure on the first region, the first fin layer in the second pseudo gate opening is removed, the surface of the second fin layer is exposed, and a second gate opening is formed in the second region; and after the first fin part layer is removed, a second improvement layer is formed on the surface of the second fin part layer on the second region, and the thickness of the second improvement layer is smaller than that of the first improvement layer. The method is beneficial to improving the reliability of the formed semiconductor structure.

Description

technical field [0001] The invention relates to the technical field of semiconductor manufacturing, in particular to a semiconductor structure and a forming method thereof. Background technique [0002] With the development of semiconductor technology, the control ability of the traditional planar metal-oxide semiconductor field effect transistor on the channel current becomes weaker, resulting in serious leakage current. Fin Field Effect Transistor (Fin FET) is an emerging multi-gate device, which generally includes a fin protruding from the surface of the semiconductor substrate, and a gate structure covering part of the top surface and sidewall of the fin, located at The source and drain doped regions in the fins on both sides of the gate structure. Compared with planar metal-oxide semiconductor field effect transistors, fin field effect transistors have stronger short-channel suppression capability and stronger operating current. [0003] With the further development o...

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Problems solved by technology

[0004] However, the performance of fin field effect transistors with trench gate surround structure in the prior art needs to be improved

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