Power semiconductor module low-inductance packaging structure and packaging method

Abstract

The invention relates to the technical field of power semiconductor modules, and provides a power semiconductor module low-inductance packaging structure, which comprises a substrate and a power semiconductor module unit arranged on the substrate, wherein the power semiconductor module unit is used for forming a double-switch circuit structure capable of reducing inductance, the power semiconductor module unit comprises a plurality of lining plates arranged on the substrate at intervals, adjacent lining plates are connected through a first bonding wire, two connected lining plates are connected with a power terminal group extending out of the outer tube shell, and the power terminal group comprises two sub-power terminals which are partially overlapped but not in contact, and is used for generating electromagnetic coupling to reduce inductance when the two sub-power terminals conduct currents in different directions. The invention further provides a low-inductance packaging method of the power semiconductor module, wherein the method is used for manufacturing the low-inductance packaging structure of the power semiconductor module. The power semiconductor module low-inductance packaging structure of the invention has the advantages of high reliability, high power density and low inductance.

Description

technical field [0001] The invention relates to the technical field of power semiconductor modules, in particular to a low-inductance packaging structure and packaging method of a power semiconductor module. Background technique [0002] High-voltage and high-power semiconductor power devices are widely used in high-power electric energy conversion such as rail transit, smart grid, and high-voltage flexible direct transmission. The wide application of high-voltage and high-power semiconductor power devices also puts forward higher requirements, which continue to promote the maximum output current specifications of fully-controlled power devices mainly represented by semiconductor power devices such as insulated gate bipolar transistors and Technical limit of current density. [0003] The innovation of semiconductor power chip technology and the continuous innovation of semiconductor device module packaging technology are important guarantees for the improvement of semicondu...

AI Technical Summary

Problems solved by technology

Using this circuit structure, when meeting the rapidly increasing system power requirements, has a great impact on the operating temperature of the semiconductor power chip, withstand voltage design, thermal stress of the material, electromagnetic stress, and the operating temperature of the packaging material, forcing the system A large design margin is reserved in the design, thus limiting the performance of power semiconductors

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