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System and method for processing memory recoverable errors and medium

A storage medium and memory technology, applied in the field of server fault tolerance, can solve problems such as server system performance degradation and security degradation, and achieve the effects of easy upgrade and maintenance, high security, and high application value

Inactive Publication Date: 2021-07-02
SHANDONG YINGXIN COMP TECH CO LTD
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  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0006] The present invention mainly solves the problems of reduced server system performance and reduced security during the process of locating the recoverable problems caused by faulty components

Method used

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  • System and method for processing memory recoverable errors and medium
  • System and method for processing memory recoverable errors and medium

Examples

Experimental program
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Effect test

Embodiment 1

[0038] BIOS is the Basic Input Output System, which is the main component of the server that controls the hardware and provides the operating system to control computer hardware and external devices. The BIOS option is a function option displayed in the BIOS setup for users to adjust. The setting value in the option turns off or turns on certain functions of the server, such as CMOS settings (such as: date, time, hardware timing, and monitor display mode, etc.), CPU (Central Processing Unit) operating frequency, operating voltage setting, Temperature protection setting, chipset setting, power management setting, plug and play and peripheral device connection interface configuration setting, system startup sequence setting, hardware password or software password setting and hard disk automatic detection sequence setting .

[0039] There is a special operating mode in the BIOS called SMM. The only way to enter SMM is to trigger the SMI signal. When SMM is called through SMI, the...

Embodiment 2

[0049] The embodiment of the present invention provides a method for handling memory recoverable errors, please refer to figure 2 , including the following steps:

[0050] When an error occurs in the memory, the error is a recoverable error in this embodiment, and the CPU can communicate with the GPIO pin of the BMC through its own error pin.

[0051] The BMC starts to execute the alarm operation according to the alarm program stored in itself, and the alarm processing program is implemented according to the BMC code.

[0052] Read the memory presence bit information in the register of the CPU, and start analysis according to the alarm program.

[0053] Because some memory of the server has been configured in advance, the errors of different memory can be distinguished for BMC and CPU.

[0054] The memory of the CPU is used to store the in-position information of the memory, and the in-position information is written according to the physical address, logical address and li...

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Abstract

The invention discloses a system for processing a memory recoverable error, which is applied to a server and comprises a CPU, a BMC and the memory, wherein the CPU is respectively connected with the memory and the BMC; the CPU is used for monitoring whether the memory generates a recoverable error or not and storing in-place information of the memory; the BMC is used for storing an alarm program, when the CPU monitors a recoverable error, the BMC analyzes the in-place information of the memory and positions the memory with the recoverable error; in this way, the error pin of the memory can be connected with the GPIO of the BMC, and then the BMC is connected with the register of the CPU through the PECI, so that the recoverable error can be processed without occupying the service data bandwidth; the invention has the advantages of high security and easy upgrade and maintenance, and has very high application value for server alarm design.

Description

technical field [0001] The invention relates to the technical field of server fault tolerance, in particular to a system, method and medium for processing memory recoverable errors. Background technique [0002] At present, when a recoverable error occurs in the memory, it is generally solved by making the memory error trigger an SMI interrupt, entering the BIOS SMI interrupt handler, analyzing and locating the specific slot of the memory where the recoverable error occurs. However, this Technical means have the following disadvantages: [0003] First: Frequent triggering of SMI interrupts will seriously affect the performance of the server system, causing the upper-layer services running on the server to freeze; [0004] Second: Too many error handling programs are added to SMI, which leads to a longer execution time of SMI, making the server system unstable, and because SMI is a privileged mode of the CPU, unstable factors are easy to be attacked by hackers, and security ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F11/07G06F11/32
CPCG06F11/073G06F11/0787G06F11/079G06F11/327
Inventor 李道童艾山彬芦飞
Owner SHANDONG YINGXIN COMP TECH CO LTD
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