NAND flash memory device and forming method thereof
A technology for flash memory devices and storage areas, which is applied in the fields of electrical solid state devices, semiconductor devices, semiconductor/solid state device manufacturing, etc., and can solve problems such as the performance of NAND flash memory devices that needs to be improved
Pending Publication Date: 2021-07-06
SEMICON MFG INT (SHANGHAI) CORP +1
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Problems solved by technology
[0004] However, the performance of NAND flash memory devices still needs to be improved
Method used
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[0048] A NAND flash memory device in the prior art, which uses gaps as the isolation between word lines, compared with sidewall materials, can reduce the capacitance between adjacent word lines in the NAND flash memory device, thereby improving the NAND The crosstalk problem in the programming process of the flash memory device and the repeated reading and writing ability of the NAND flash memory device.
[0049] Voids are the main product of the process of void formation. see figure 1 , in the existing process of forming the gap, the spacer structure formed on the sidewalls of the gate structure located on both sides of the first source-drain doped region, because the thickness is too large, the spacer structure has to be formed after subsequent removal of the spacer structure The distance between the first gap 300 and the conductive connection structure CT electrically connected to the first source-drain doped region is relatively short, which easily causes the material of ...
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Abstract
The invention discloses an NAND flash memory device and a forming method thereof, and the method comprises the steps: carrying out the etching and thinning of a first initial gap wall structure after forming a first source-drain doped region, and enabling the first initial gap wall structure to form a first gap wall structure; after the first gap wall structure is formed, forming a bottom dielectric layer in the first groove; after the bottom dielectric layer is formed, removing the first gap wall structure, so that first openings are formed between the bottom dielectric layer and the first gate structure and between the bottom dielectric layer and the second gate structure; forming a top dielectric layer on the inner wall of the first opening, the first opening and the bottom dielectric layer, forming first gaps between the bottom dielectric layer in the first groove and the first gate structure and between the bottom dielectric layer in the first groove and the second gate structure, and wrapping the first gaps by materials of the top dielectric layer; and forming a first conductive connection structure penetrating through the top dielectric layer and the bottom dielectric layer, wherein the first conductive connection structure is electrically connected with the first source-drain doped region. According to the scheme, the yield of the NAND flash memory device can be improved.
Description
technical field [0001] The invention relates to the technical field of semiconductors, in particular to a NAND flash memory device and a forming method thereof. Background technique [0002] The main feature of flash memory is that it can keep stored information for a long time without power on, and has the advantages of high integration, fast access speed, easy erasing and rewriting, etc., so it has been widely used in many fields such as microcomputer and automatic control a wide range of applications. [0003] According to different structures, flash memory can be divided into two types: Nor Flash and NAND Flash. NAND flash memory devices have the advantages of higher cell density, higher storage density, faster writing and erasing speeds, etc., and have gradually become a more commonly used structure in flash memory, and are currently mainly used in digital cameras, etc. flash memory card and MP3 player. Wherein, an existing NAND flash memory device uses a space as an...
Claims
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Patent Timeline
Login to View More IPC IPC(8): H01L21/764H01L27/11524H01L21/28H01L29/423
CPCH01L29/401H01L29/42364H01L21/764H01L29/42324H10B41/35
Inventor 韩亮王海英
Owner SEMICON MFG INT (SHANGHAI) CORP