Semiconductor device

Abstract

The invention provides a semiconductor device comprising a substrate having a first region and second regions, the first region being located between two adjacent second regions; two sub drain regions located in the first region of the substrate; a dummy structure positioned on the substrate between the two adjacent sub drain regions; a source region located in the second region of the substrate; a gate structure positioned on the substrate between the first region and the second regions. The ESD capacity of the device is improved through the dummy structure, an SAB photomask in the prior art is not needed, a new technological process does not need to be introduced, and the dummy structure can be directly and synchronously formed in the manufacturing process, so that the manufacturing cost of the device is reduced.

Description

technical field [0001] The invention relates to the technical field of semiconductors, in particular to a semiconductor device. Background technique [0002] As semiconductor device technology continues to enter submicron and deep submicron, the reliability of electrostatic discharge protection devices is becoming more and more important. Due to electrostatic discharge (Electro-Static-Discharge, ESD) causes discharge current to flow through the device and generates local heating or electric field concentration, electrostatic damage is prone to occur in the device, resulting in failure of the IC device; short circuit to ground at a certain terminal of the device , then a current pulse is generated at the moment of discharge, and the Joule heat generated by the large current causes the local metallization of the device to melt or the hot spots on the chip to induce secondary breakdown, etc.; when the device is not in contact with the ground, there is no direct discharge path t...

AI Technical Summary

Problems solved by technology

[0003] In the prior art, in order to overcome the problem of the decrease of electrostatic discharge protection ability brought about by the lightly doped drain (Lightly Doped Drain, LDD) structure, the electrostatic discharge ion implantation (ESD implant) technology is usually combined with the silicide baffle (Salicide Blocking (SAB) process, using SAB technology to increase the resistance of the drain region to improve the current discharge capability of the device, so that the current can flow uniformly in the silicon wafer, and the ESD device needs a SAB mask to improve the ESD protection capability of the device , while the cost of the SAB mask is relatively high, and reducing the mask can reduce the manufacturing cost, especially for the design and manufacture of nanoscale integrated circuits

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