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Comprehensive test method for SiC wafer and epitaxial layer structure thereof

A comprehensive testing and epitaxial layer technology, applied in optical testing flaws/defects, measuring devices, material analysis by optical means, etc., can solve the problems of use and difference, improve economic efficiency, reduce cost input, and improve work efficiency Effect

Pending Publication Date: 2021-08-24
杭州乾晶半导体有限公司
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Problems solved by technology

[0005] The purpose of the present invention is to provide a method that integrates various characterization and analysis means to simplify the analysis process, and through Two-dimensional scanning, 3D imaging, and fluorescence analysis of various defects can match the defect morphology and photoelectric properties in the sample one by one, thereby improving work efficiency and reducing costs. A comprehensive testing method for SiC wafers and their epitaxial layer structures

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  • Comprehensive test method for SiC wafer and epitaxial layer structure thereof
  • Comprehensive test method for SiC wafer and epitaxial layer structure thereof
  • Comprehensive test method for SiC wafer and epitaxial layer structure thereof

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Embodiment Construction

[0038] The technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the embodiments of the present invention. Apparently, the described embodiments are only some of the embodiments of the present invention, not all of them. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art without making creative efforts belong to the protection scope of the present invention.

[0039] Explanation of terms:

[0040] i. Micropipe defect: A crystallization defect in SiC wafers, which belongs to the category of line defects, physical holes with micron-scale diameters, and threading screw dislocations with large Burgers vectors. It is a unique defect in SiC crystals, which can extend for a long distance in the crystal, even throughout the entire crystal, and has a great impact on the performance and yield of SiC devices.

[0041] ii. Epitaxial layer: Si...

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Abstract

The invention provides a comprehensive test method for a SiC wafer and an epitaxial layer structure thereof. A laser confocal imaging system is adopted, so that the SiC microtube defect can be observed in a transmission orthogonal polarization mode, the surface appearance of a sample can be observed through differential interference, and compared with a common light mirror, the device has higher spatial resolution which is as high as 120nm. Meanwhile, high-resolution three-dimensional morphology imaging of the surface can be realized through layer cutting scanning in the height direction, so that the surface roughness and other height information can be obtained; and through fluorescence observation, the crystallization quality and uniformity of the epitaxial layer can be distinguished, and distribution information of defects and distribution information of polymorphic structures can be obtained. Therefore, various characterization analysis means are integrated together, the analysis process is simplified, the working efficiency is improved, and the cost is reduced.

Description

technical field [0001] The invention belongs to a comprehensive method for testing the surface and subsurface structure of a SiC wafer and its epitaxial layer, in particular to a comprehensive testing method for a SiC wafer and its epitaxial layer structure for comprehensive analysis of surface roughness and defects. Background technique [0002] SiC material has received extensive attention due to its excellent semiconductor properties, and has become a potential basic material in the field of electronic devices, and has been widely used in high temperature, high frequency, high power and other aspects. [0003] However, lattice defects of semiconductor substrates or epitaxial layers on semiconductor substrates affect the characteristics of electronic devices such as semiconductor devices, so the type and density of defects are extremely important parameters in terms of substrate quality evaluation. [0004] For SiC wafers, the analysis of surface roughness, micropipe defec...

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G01N21/01G01N21/95
CPCG01N21/01G01N21/9501G01N2021/0112
Inventor 皮孝东徐所成高万冬卢慧杨德仁
Owner 杭州乾晶半导体有限公司
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