33 results about "Line defects" patented technology

The invention discloses a pipe online defect detection method and system, and relates to the technical field of image detection. The detection method comprises the following steps: placing a to-be-detected pipe in a dark box environment, irradiating the to-be-detected pipe in a rotating state through a light source, displaying a pipe projection on a projection surface, and setting a detection line at the upper end of the projection surface; comparing the detection line with a set reference line in real time, and marking a suspected warping area according to the local offset; performing three-dimensional image reconstruction on the suspected warping area to generate a simulation three-dimensional point cloud model; the method is technically characterized in that preliminary judgment passes through a grading strategy of'rapid screening-precise reinspection ', and the detection speed and precision are balanced; by means of the optical path principle and threshold value comparison, positioning operation of the whole-surface suspected warping area can be rapidly completed, only data of a local area (suspected warping area operation) is analyzed, the hardware cost and energy consumption are greatly reduced, and the high-speed online detection requirement is met.

The invention provides an electric power line defect detection method and system based on visual identification, and relates to the technical field of line detection.The method comprises the steps that firstly, a visible light and infrared image dual-light registration and differential operation technology is adopted, and a fusion feature map capable of reflecting component thermal anomaly and material difference at the same time is generated; secondly, a black box type target detection model is abandoned in a part positioning link, but line segment screening and reconstruction are carried out by combining probability Hough transform with specific prior geometric knowledge of a power line, so that dependence on a large amount of labeled data is reduced, interpretability of a positioning process is enhanced, and the positioning accuracy is improved; according to the method, accurate areas of key components such as wire insulators can be extracted in a complex background, the concept of a probability saliency map is introduced in a defect identification core link, so that a defect area is enhanced and highlighted, and then a complete defect contour is determined by adopting an adaptive threshold segmentation and area growing algorithm; accurate mapping from pixel-level features to object-level defects is realized.

The invention discloses an on-line defect detection system for float glass production, relates to the technical field of glass defect detection, and solves the technical problem that the quality of a finished product does not reach the standard due to the fact that tiny defects or inclusions in a glass plate are not considered in the prior art. The method comprises the following steps: irradiating a glass plate by laser and collecting to obtain a light propagation image, preprocessing the light propagation image to obtain a gray-scale light image, taking a mode of the light intensity of pixel points in the gray-scale light image as standard light intensity, dividing abnormal pixel points based on the standard light intensity, and obtaining an abnormal feature map in the gray-scale light image based on the abnormal pixel points. Extracting light reaction features in the abnormal feature map; and matching the light reaction characteristics with standard geometric characteristics to obtain a defect shape, obtaining the pixel type and the pixel defect intensity of the defect shape based on the number of abnormal pixel points in the defect shape and the light intensity, and matching the defect shape, the pixel type and the defect pixel intensity with standard defect data to obtain corresponding defect data.

To provide a polishing method capable of reducing line defects on a surface of a silicon carbide substrate in polishing the substrate.SOLUTION: A method for polishing a silicon carbide substrate is provided. The polishing method includes a step of supplying a polishing composition to a substrate to be polished and polishing the substrate to be polished. The polishing composition includes abrasive grains. The abrasive grains have a zeta potential X [mV] in the polishing composition. A surface of the substrate to be polished has a zeta potential Y [mV]. Here, the zeta potential Y is measured for the surface of the substrate to be polished in the polishing composition using a solid zeta potential measuring device. The zeta potential X [mV] and the zeta potential Y [mV] satisfy X Y>250.SELECTED DRAWING: None

The invention discloses a periodic defect-based low-dielectric-loss monocrystal diamond preparation method, which belongs to the field of semiconductors, and comprises the following steps: providing a diamond substrate; the diamond substrate is subjected to photoetching treatment, so that a dot matrix pattern is formed on the upper surface of the diamond substrate through photoetching, and the distance between every two adjacent dots in the dot matrix pattern is equal to the wavelength corresponding to the frequency of the external electric field; an etching process or an ion implantation process is adopted, the area where each point in the dot matrix pattern is located is damaged, a diamond damaged substrate is obtained, and the upper surface of the diamond damaged substrate is provided with a periodic defect dot matrix structure; growing a single crystal diamond layer with periodic defects on the upper surface of the diamond damaged substrate, and adjusting a growth process to enable the defects on the single crystal diamond layer to be line defects penetrating through the single crystal diamond layer; and carrying out fragmentation treatment on the damaged diamond substrate and the monocrystal diamond layer to obtain a monocrystal diamond finished product with periodic defects.

Embodiments of the present application provide a method and device for detecting defects of a ground wire and a medium. The method comprises: acquiring a left view and a right view of a target region synchronously collected by a binocular imaging device; the target region includes a ground wire to be detected; based on the left view and the right view, a first depth map corresponding to the target region is acquired; pixel points outside a preset distance range in the first depth map are removed to obtain a second depth map; the left view, the right view and the second depth map are input into a pre-trained semantic segmentation model to obtain an image segmentation result; and based on the image segmentation result, a defect detection result of the ground wire to be detected is acquired. The method is used to improve the detection accuracy of defects of the ground wire.

The present invention belongs to the field of computer vision, and relates to a method for automatic classification of power transmission line defects based on deep visual learning, including the following steps: collecting sample image data of the power transmission line, and dividing the image in the sample image data into a number of segmented areas; calculating the maximum depth of the defect feature; presetting the size of the first depth threshold and the second depth threshold; if the maximum depth is less than or equal to the first depth threshold, analyzing whether the defect feature belongs to a corrosion spot for defect assessment level; if the maximum depth is greater than the first depth threshold and less than or equal to the second depth threshold, analyzing the position and area size of the defect feature for defect assessment level; if the maximum depth is greater than the second depth threshold, directly evaluating the defect feature for defect assessment level. The present invention solves the problem that the existing defect assessment compares the similarity of defect features to judge the severity, and the comparison process takes a lot of time.

The invention discloses a substrate with a prefabricated hole structure and a processing method and processing equipment thereof. The substrate with the prefabricated hole structure comprises a semiconductor substrate and the prefabricated hole structure formed on the semiconductor substrate. The edge of the processing area of the prefabricated hole structure is defined as an extension distance h from the processing boundary of the hole structure to the interior of the semiconductor substrate, wherein h is equal to the average radius of the hole structure / 10; the semiconductor substrate has no depth area defect, and the depth area defect is an observable line defect or surface defect extending to the interior of the semiconductor substrate along the edge of the processing area for more than h; taking any cross section of the semiconductor substrate, and observing the edge of a processing area by adopting SEM characterization; the prefabricated hole structure is directly formed by a laser processing method and is not subjected to a cleaning or post-treatment process. The substrate has no depth area defect, so that an expansion path of the depth defect in subsequent device manufacturing can be blocked from the source, the problems of substrate cracking and fragment caused by the defect are avoided, the damage rate of the substrate in the subsequent process is reduced, and the material utilization rate is improved.

The invention provides a piezoelectric defect photonic crystal plate preparation method, which comprises the following steps: determining the change range of a target band gap, and selecting a vibration reduction photonic crystal material and geometric parameters according to the change range of the target band gap; introducing a cantilever beam type line defect structure based on the optimal energy diversion effect according to the vibration reduction photonic crystal material and the geometric parameters, and determining the material and the geometric parameters of the cantilever beam type line defect structure; determining the length of piezoelectric patches fixedly connected to the upper and lower surfaces of the cantilever beam based on the corresponding relationship between the material of the cantilever beam type line defect structure and geometric parameters; and acquiring the arrangement angle of the resonance body of the cantilever beam type line defect structure, and checking the interference condition of the cantilever beam type line defect structure based on the arrangement angle to obtain the piezoelectric defect photonic crystal plate. According to the invention, too complex preparation of the piezoelectric defect photonic crystal plate caused by too many design parameters can be avoided, and flow guide can be accurately carried out on vibration energy of a specific frequency in a low-frequency band gap range.

The invention discloses a machine vision identification method and system for a zinc flow line defect of a galvanized sheet, and relates to the technical field of zinc flow line defect identification of the galvanized sheet, a Stokes vector method is adopted to perform polarization state decomposition on an original image sequence, diffuse reflection light and specular reflection light are separated, and an enhanced image is obtained; a dynamic contrast stretching algorithm is combined, a high-contrast flow line gradient map is obtained, a local direction field is calculated through a Hessian matrix according to the flow line gradient map, dynamic structure elements are generated based on the direction field, asymmetric closed operation is carried out, and a connected defect binary mask is obtained; according to the method, the structural elements are adaptively selected according to the actual direction of the zinc flow lines, it is guaranteed that important geometric information cannot be lost in the processing process, and the processing accuracy is improved. The existence of the defect can be identified, and the type and severity of the defect can be further judged.

The present disclosure provides a method, device, equipment and medium for identifying line defects of a wafer; the method comprises: collecting stress fluctuation data of each sampling point on a pre-processed wafer to be tested; selecting candidate sampling points from all sampling points according to the stress fluctuation data of each sampling point; constructing a line-shaped connected region based on the candidate sampling points; and determining whether the line-shaped connected region is a line defect according to the stress fluctuation data of all candidate sampling points in the line-shaped connected region.

The invention discloses a line defect detection method and device for a display panel. The method comprises the following steps: dividing a first pixel driving circuit column with line defects into N pixel driving circuit groups; in the direction from the display area to the binding area, the data lines and the compensation signal lines connected with the first pixel driving circuit columns are sequentially cut off at the positions between every two adjacent pixel driving circuit groups; when the position between the ith pixel driving circuit group and the (i + 1) th pixel driving circuit group is cut off, if the light-emitting element corresponding to the first pixel driving circuit column in the driving stage does not display a dark line, and / or the induction line type defect detection signal in the defect detection stage is smaller than a detection threshold value, the detection stage is switched to the (i + 1) th pixel driving circuit group; the defect position of the locking line defect is located in the ith pixel driving circuit group; the induction line type defect detection signal is a difference value between the induction signal before a set time period and after the set time period. According to the technical scheme provided by the invention, the short-circuit line defect position of the display panel can be accurately locked.

The application discloses a multi-dimensional PWQ method for BEOL process defect hotspot detection of an integrated circuit, which comprises the following steps: 1) adopting a traditional PWQ method to detect and screen out weak patterns within a process window range of a target metal layer; 2) for the weak patterns within the process window range, calling a GDS of a same layer of the target metal layer, a via hole GDS of an upper layer of the target metal layer and a via hole GDS of a lower layer of the target metal layer to form three-layer GDS; 3) aligning and measuring original image data obtained by EP5 shooting with the three-layer GDS to complete multi-dimensional D2DB processing; 4) calculating a landing coverage ratio of a via hole on a line of the target metal layer, combining a defect detection result of a line of the same layer to judge a connection condition of the target metal layer and the via holes of the upper and lower layers; and 5) generating a detection report containing line defect information of the same layer and the landing coverage ratio of the via hole. The application can realize defect detection of a same layer wiring, obtain information of connection holes of upper and lower layers and evaluate the connection condition of the same layer metal and the connection holes / via holes of the upper and lower layers.

The invention provides a method, a device and equipment for identifying a line defect of a wafer and a medium. The method comprises the following steps: collecting stress fluctuation data of each sampling point on a pre-processed wafer to be detected; selecting candidate sampling points from all the sampling points according to the stress fluctuation data of each sampling point; constructing a linear connected region based on the candidate sampling points; and according to the stress fluctuation data of all the candidate sampling points in the linear connected region, judging whether the linear connected region has a linear defect or not.

The invention discloses a line defect detection method and device, a storage medium and a product, and relates to the technical field of defect detection.The method comprises the steps that a first binarization image obtained after an original image is subjected to preliminary binarization processing is obtained, and all independently-connected first areas in the first binarization image are determined; performing ellipse fitting on each first region in the first binary image and filling the ellipse regions to obtain a second binary image; determining each independently connected second region in the second binary image; determining a weighting coefficient of a global threshold value and a local threshold value according to a first region and a second region in the global region; and carrying out weighted summation on the global threshold and the local threshold according to a weighting coefficient to obtain a self-adaptive binarization threshold, carrying out binarization processing on the global region by adopting the self-adaptive binarization threshold to obtain a third binarization image, and carrying out detection based on the third binarization image to obtain a line defect detection result. The detection accuracy of the line defect of the display screen or the optical lens is improved.

The invention provides a manufacturing method of a blank EUV mask substrate. The method comprises the following steps: step 1, providing a transparent substrate; 2, depositing a preset number of Bragg pairs on the surface of one side of the transparent substrate to form a reflection stacking layer; 3, scanning the reflection stacking layer by adopting a laser confocal microscope and a white light interferometer respectively, and analyzing whether the reflection stacking layer has defects according to detection results of the laser confocal microscope and the white light interferometer; 4, when the reflection stacking layer does not have defects, the step 2 and the step 3 are executed repeatedly until all the logarithm Bragg pairs are deposited and defect detection is completed, and a Bragg reflection layer without defects is formed; and 5, when the reflection stacking layer has defects, returning to the step 1. The method not only can effectively detect the surface defect and the embedding defect of the blank EUV mask substrate, but also can accurately position the defect depth, has cost effectiveness, and is suitable for non-destructive online defect detection.

This invention relates to an online defect detection system and method for refractory material sintering. It obtains a standard sequence of body temperature and an ambient temperature standard sequence based on the heating curve. The time-series thermal imaging image of the refractory material sintering process is segmented into a body image based on the refractory material stacking area and an ambient image based on the surrounding environment. An ambient temperature sequence is extracted from the ambient image. Based on the ambient temperature sequence and the ambient temperature standard sequence, the range of suspected defects is determined based on the obtained defect features. The range of suspected defects is extracted from the body image, and a temperature feature sequence of the suspected defect range is obtained. The degree of deviation between the temperature feature sequence and the temperature standard sequence is obtained. Based on the degree of deviation, it is determined whether a defect exists in the suspected defect range. Furthermore, time-series synchronization analysis is used to distinguish between physical defects and thermal interference. This invention improves detection efficiency and reliability through environment-oriented and localized focusing strategies, making it suitable for online detection needs.

The application relates to the fields of image processing and smart grid maintenance technology, and discloses a power transmission line defect image intelligent identification and grading method, which acquires high-dimensional visual features, preliminary classification confidence and a space mask matrix of an original image; calculates the topological risk weight of a target defect; splices the visual features and the topological risk weight to perform database retrieval, acquires a search prior grade and an evolution anchor point image; when the preliminary classification confidence is lower than a threshold value, decoupling interpolation and cross-level judgment are performed on the original image and the anchor point image in a latent space based on the mask matrix, and a gradient jump point is output; finally, the search prior grade, the topological risk weight and the gradient jump point are fused to calculate a comprehensive risk score, and a defect severity grade is output by comparing the threshold value. The application fuses historical experience, spatial mechanics attributes and evolution trend multi-dimensional parameters, solves the problem that a critical state defect is easily misjudged by single feature grading, and improves the reliability of the grading result.

The invention discloses a bulk acoustic wave resonance device, a forming method thereof and a filter. An intermediate layer on the substrate, the intermediate layer including a cavity and a crystal defect, the crystal defect including one or more of a point defect, a line defect, and a surface defect; the piezoelectric layer is located on the middle layer, the piezoelectric layer comprises a first side and a second side which are opposite to each other, and the middle layer and the substrate are located on the first side; the first electrode layer is located on the first side of the piezoelectric layer; the second electrode layer is located on the second side of the piezoelectric layer, and the projection of the first electrode layer and the projection of the second electrode layer towards the direction of the substrate have an overlapped area. The crystal defect in the middle layer can form a charge trap, and a conductive plane can be prevented from being formed on the surface of the substrate, so that the generated parasitic coupling phenomenon is effectively inhibited, the electric loss is reduced, and the Q value of the resonance device or the electromechanical coupling coefficient (Kt) of the resonance device is improved.

The invention provides a photomask plate defect detection method of a photoetching machine. The photomask plate defect detection method of the photoetching machine comprises the following steps: irradiating a photomask plate through a light source of the photoetching machine, and obtaining a photomask plate image by a camera of the photoetching machine; performing line defect detection on the photomask image through a spatial domain Gaussian function and a gray domain Gaussian function; performing block defect detection by performing adaptive threshold binarization and morphological closed operation on the photomask image; and carrying out two-dimensional Gaussian kernel-based image convolution and Laplacian convolution on the photomask image to carry out fuzzy particle defect detection. Therefore, the detection effect of the photomask plate defect of the photoetching machine can be improved by detecting the line defect, the block defect and the fuzzy particle defect on the basis of the photomask plate image in a targeted manner.

The application discloses a line defect detection method and device of a display panel, and the method comprises the following steps: dividing a first pixel driving circuit column with a line defect into N pixel driving circuit groups; cutting off the positions of a data line and a compensation signal line connected by the first pixel driving circuit column between two adjacent pixel driving circuit groups in the direction from the display area to the binding area; when the cutting-off position is between the i-th pixel driving circuit group and the i+1-th pixel driving circuit group, if the light-emitting element corresponding to the first pixel driving circuit column in the driving stage does not display a dark line, and / or the line defect detection signal in the badness detection stage is less than the detection threshold, then the defect position of the line defect is located in the i-th pixel driving circuit group; the line defect detection signal is the difference between the sensing signal before a set time period and the sensing signal after the set time period. The technical scheme provided by the application can accurately lock the short-circuit line defect position of the display panel.

This application discloses a method, apparatus, and storage medium for detecting point and line defects in display screen images, which improves the accuracy of display screen defect detection. The method involves: acquiring an image of the display screen to be tested; randomly selecting location pixels from the image and generating a location circle region based on these pixels; calculating the gray-level gradient vector from the sample pixels within the location circle region to the corresponding location pixels, and calculating the mean of the gray-level gradient vector; calculating the Euclidean distance between the sample pixel located at the mean of the gray-level gradient vector and each location pixel to generate an abnormal contour region; performing region filtering on the image, and generating a difference image based on the mean gray-level of the remaining region and the image; pre-segmenting and extracting the difference image to generate the defect region to be tested; applying an array projection estimation algorithm to the defect region to be tested to generate a suspected line defect region; and performing feature filtering on the suspected line defect region to generate a set of point defects and line defects.

The invention relates to the technical field of TFT panel detection, in particular to a TFT panel defect identification method, a computer program product and a TFT panel defect identification system. According to the TFT panel defect identification system, by executing the steps of the TFT panel defect identification method, the image of the TFT-LCD panel is obtained under light of various states, and different types of defects are captured more comprehensively, so that the comprehensiveness and accuracy of detection are improved; a defect classification model is adopted to automatically identify and classify various types such as point defects, line defects and Mura type defects, the detection speed is improved, the recognition capability for complex defect modes is enhanced, errors caused by human factors are reduced, background suppression and B-spline surface fitting are independently executed for the Mura type defects, and the detection accuracy is improved. The defect areas are effectively highlighted, the detection precision of Mura defects is improved, and the problem that the detection precision of an automatic detection system is large in fluctuation is effectively solved.

1. The name of the design product: power distribution line defect detector. 2. The use of the design product: for power distribution line defect detection. 3. The design points of the design product: in shape. 4. The picture or photo that best shows the design points: perspective view 1.

The invention discloses an analysis method and an inhibition method for bright line defect formation of a glass substrate, and belongs to the technical field of glass substrate manufacturing. The analysis method comprises the following steps: acquiring key parameters of a feeding structure, including the shoulder height of a main glass flow transition area, the diameter of a feeding exhaust straight pipe and the liquid level height, setting the liquid level height inevitably formed by nitrogen bubbles, and acquiring the internal vortex height and the liquid level height accidentally formed by the nitrogen bubbles; according to the parameters, abnormal glass layer tearing caused by liquid level imbalance due to nitrogen bubbles is a sufficient condition for forming the bright line defect of the glass substrate, the forming risk of the bright line defect of the glass substrate is analyzed and determined, and a scientific basis is provided for optimizing the liquid level height and preventing defect formation. Meanwhile, based on an analysis method for forming the bright line defect of the glass substrate, a suppression method is provided, and the formation of the bright line defect of the glass substrate is suppressed by accurately controlling the liquid level height of the feeding exhaust straight pipe.

The invention discloses an automatic overturning method suitable for single crystal flat interface growth of a Czochralski method resistance furnace, and belongs to the technical field of crystal preparation. Comprising the following steps: charging a furnace, vacuumizing, inflating, heating and melting materials, lifting a pot position, sinking seed crystals, seeding the crystals, automatically turning over, ending, discharging embryos and the like. Through an automatic overturning process that the rotating speed and the pulling speed are gradually increased under the control of a program, the problem that in an original overturning process, conversion from a convex interface to a flat interface is completed on a single section is solved; due to the fact that crystals on the cross section grow in different periods (crystals at different radiuses on the cross section perpendicular to the growth axis do not grow at the same time), point defects, line defects and dislocation are formed in the diameter amplification process, and it is verified that the point defects, line defects and dislocation performance in the crystals are greatly reduced through the technology.

The present disclosure relates to a micro LED display apparatus, and to a display apparatus capable of stably driving a gate driver in a gate in active (GIA) circuit. According to the present disclosure, a gate driver in the GIA circuit of a display apparatus can be stably driven without the appearance of horizontal line defects.

The invention provides a terahertz wave band photonic crystal structure based on square lattices and application. The photonic crystal structure is composed of a substrate layer and a waveguide layer. One technical effect of the invention is that the design is reasonable, selective transmission of terahertz wave bands can be realized, and terahertz waves in a specific frequency range can be propagated in a waveguide channel along a boundary path by ingeniously regulating and controlling key elements such as lattice parameters, line defects and different area proportions of the photonic crystal.

This invention provides a method and system for detecting power line defects based on visual recognition, belonging to the field of power line detection technology. Firstly, this invention employs dual-light registration and differential computation techniques using visible light and infrared images to generate a fused feature map that simultaneously reflects component thermal anomalies and material differences. Secondly, in the component localization stage, it abandons the black-box target detection model and instead utilizes probabilistic Hough transform combined with prior geometric knowledge specific to power lines for line segment selection and reconstruction. This not only reduces the dependence on large amounts of labeled data but also enhances the interpretability of the localization process, enabling the extraction of precise regions of key components such as conductors and insulators from complex backgrounds. In the core defect identification stage, the concept of a probabilistic saliency map is introduced, enhancing the prominence of defect areas. Subsequently, adaptive threshold segmentation and region growing algorithms are used to determine the complete defect contour, achieving accurate mapping from pixel-level features to object-level defects.

Disclosed in the embodiments of the present application are a method and apparatus for eliminating wafer surface defects, a medium and a wafer manufacturing method. The method for eliminating wafer surface defects comprises: acquiring an associated defect type having a quantity correlation with a line defect; determining a causative defect of the line defect from the associated defect type, the causative defect being a first cause for forming the line defect; acquiring a second cause of the line defect in a wafer processing process; and, for the first cause and the second cause, respectively generating a first elimination measure for reducing the number of the causative defects and a second elimination measure for instructing modifying processing parameters in the wafer processing process, wherein the first elimination measure and the second elimination measure can reduce the number of the line defects on the surface of the wafer.