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Tri-gate Ga2O3 transverse MOSFET power device and preparation method thereof

A power device and lateral technology, applied in the field of microelectronics, can solve the problems of restricting the development of SiC power devices, low channel mobility, and many defects, and achieve the advantages of improving short-circuit withstand capability, increasing mobility, and reducing saturation current density. Effect

Pending Publication Date: 2021-10-26
ZHEJIANG XINKE SEMICON CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0003] In order to achieve high application reliability, from the perspective of device technology, SiC materials have technical and economic problems such as many defects, low channel mobility, and high cost, which seriously restrict the development of SiC power devices.

Method used

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  • Tri-gate Ga2O3 transverse MOSFET power device and preparation method thereof
  • Tri-gate Ga2O3 transverse MOSFET power device and preparation method thereof
  • Tri-gate Ga2O3 transverse MOSFET power device and preparation method thereof

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Embodiment 1

[0046] See figure 1 and figure 2 , figure 1 It is a tri-gate Ga 2 o 3 Schematic cross-sectional view of a lateral MOSFET power device; figure 2 It is a tri-gate Ga 2 o 3 Partial top view of a lateral MOSFET power device. The tri-gate Ga 2 o 3 Lateral MOSFET power devices include Ga 2 o 3 Substrate 1, Ga 2 o 3 Epitaxial layer 2 , two P-type well regions 3 , P-type control region 4 , n+ type source region 5 , channel region 6 , gate 7 , source 8 and drain 9 . In this embodiment, the heavily doped N-type Ga 2 o 3 The material is used as the substrate, and the doping concentration is greater than 1×10 19 cm -3 . Ga 2 o 3 A substrate groove is opened on the substrate 1, Ga 2 o 3 The epitaxial layer 2 is disposed in the substrate groove. In this example, Ga 2 o 3 The height of the epitaxial layer 2 is equal to the depth of the substrate groove, Ga 2 o 3 The epitaxial layer 2 is N-type lightly doped, with a doping concentration of 1×10 14 -1×10 17 cm -3...

Embodiment 2

[0055] On the basis of the above embodiments, this embodiment provides a tri-gate Ga 2 o 3 A method for fabricating a lateral MOSFET power device. See image 3 , image 3 It is a tri-gate Ga 2 o 3 Flowchart of the fabrication method for lateral MOSFET power devices. The preparation method includes:

[0056] S1: Choose Ga 2 o 3 substrate and the Ga 2 o 3 A substrate groove is formed on the substrate.

[0057] Specifically, select heavily doped N-type Ga 2 o 3 material as the substrate, using an etching process on the Ga 2 o 3 A substrate groove is formed on the upper surface of the substrate, and then the substrate is cleaned, specifically with acetone and isopropanol solutions for 30-60 seconds, rinsed with deionized water, and finally dried with high-purity nitrogen.

[0058] Preferably, Ga 2 o 3 The doping concentration of the substrate is 1×10 16 -1×10 21 cm -3 , with a thickness of 200-400 μm.

[0059] S2: Growing Ga in the substrate groove after clean...

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Abstract

The invention discloses a tri-gate Ga2O3 transverse MOSFET power device and a preparation method thereof, the device comprises a Ga2O3 substrate, a Ga2O3 epitaxial layer, two P-type well regions, a P-type control region, an n + type source region, a channel region, gates, a source and a drain, the Ga2O3 substrate is provided with a substrate groove, and the Ga2O3 epitaxial layer is arranged in the substrate groove; the two P-type well regions and the P-type control region are respectively arranged on the upper surface of the Ga2O3 epitaxial layer, the P-type control region is arranged between the two P-type well regions, and the n + type source region and the channel region are distributed on the upper surfaces of the P-type well regions at intervals; the grid electrode comprises a top grid and two side grids, the two side grids are arranged on the two sides of the channel region respectively, the top grid is arranged above the channel region, and the two ends of the top grid are in contact with the two side grids respectively; and the drain electrode is arranged on the lower surface of the Ga2O3 substrate, and the source electrode covers the upper surface of the whole device. According to the invention, the heavily doped N-type Ga2O3 is adopted as the substrate, so that the thermal stability is better, and the power born by the device and the operation temperature can be obviously improved.

Description

technical field [0001] The invention belongs to the technical field of microelectronics, in particular to a tri-gate Ga 2 o 3 Lateral MOSFET power device and its fabrication method. Background technique [0002] SiC has become one of the most advantageous semiconductor materials for manufacturing high-temperature, high-power electronic devices due to its excellent physical, chemical and electrical properties, and has a power device quality factor much greater than that of Si materials. SiC power device Metal-Oxide-Semiconductor Field-Effect Transistor (Metal-Oxide-Semiconductor Field-Effect Transistor, MOSFET) research and development began in the 1990s, which has high input impedance, fast switching speed, high operating frequency, high temperature and high pressure resistance And a series of advantages, has been widely used in switching power supply, high-frequency heating, automotive electronics and power amplifiers. [0003] In order to achieve high application reliab...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L29/78H01L29/06H01L29/08H01L29/10H01L29/423H01L21/34
CPCH01L29/7827H01L29/7831H01L29/7848H01L29/1079H01L29/0684H01L29/0607H01L29/0847H01L29/42356H01L29/66969
Inventor 李京波王小周赵艳齐红基曹茗杰
Owner ZHEJIANG XINKE SEMICON CO LTD
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