Micro-system architecture based on non-shared storage multi-core processor

A multi-core processor, non-shared technology, applied in electrical digital data processing, instrumentation, program control design, etc., can solve the problems such as the inability to meet the needs of the miniaturization of the new generation of military equipment, the system is large and complex, and achieves improved system processing. Capability, Small Size, Effect of Simplified System

Pending Publication Date: 2021-11-19
BEIJING MXTRONICS CORP +1
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

The disadvantage of non-shared memory multi-core processors is that as the number of processor cores increases, the system will be very large and complex, which cannot meet the miniaturization needs of the new generation of military equipment

Method used

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  • Micro-system architecture based on non-shared storage multi-core processor
  • Micro-system architecture based on non-shared storage multi-core processor
  • Micro-system architecture based on non-shared storage multi-core processor

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Embodiment Construction

[0026] The following describes the present invention in detail, and the features and advantages of the present invention will become more clear and definite along with these descriptions.

[0027] The word "exemplary" is used exclusively herein to mean "serving as an example, embodiment, or illustration." Any embodiment described herein as "exemplary" is not necessarily to be construed as superior or better than other embodiments. While various aspects of the embodiments are shown in drawings, the drawings are not necessarily drawn to scale unless specifically indicated.

[0028] With the increase of the number of processor cores, the multi-core processor system based on non-shared storage will be very large and complex, especially the storage resources will be greatly wasted, and the system area or volume will increase proportionally. In the prior art, in order to improve memory access bandwidth and reduce data conflicts when accessing memory, non-shared memory multi-core pr...

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Abstract

The invention discloses a micro-system architecture based on a non-shared storage multi-core processor. A programmable logic circuit is added in a system, an independent storage interface of each processor core of the multi-core processor expands an RAM (Random Access Memory) type data memory and then is respectively connected to the programmable logic circuit, and an ROM (Read Only Memory) type program memory realizes sharing through the programmable logic circuit; therefore, the system is simplified, the internuclear high-speed and high-bandwidth large-data-volume transmission bottleneck is solved, and the system processing capacity is improved.

Description

technical field [0001] The invention belongs to the application field of missile-borne weapon computers, and relates to a microsystem architecture, in particular to a microsystem architecture based on non-shared storage multi-core processors. Background technique [0002] With the increasing application of technologies such as real-time image processing, target acquisition and tracking, and precision guidance in the military field and the urgent needs of the new generation of military equipment for electronic systems with high performance, miniaturization, light weight, and high reliability, the use of isomorphic or The heterogeneous multi-core processor system has become the main way to solve the bottleneck of high-performance computing and parallel computing. A multi-core processor with non-shared storage came into being. This kind of processor core is equipped with independent storage interface and storage body. Each processor core can only access its own storage space. T...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F15/173G06F15/177G06F13/38G06F13/40G06F13/28G06F9/4401
CPCG06F15/17312G06F15/177G06F13/382G06F13/4068G06F13/28G06F9/4405
Inventor 王蕊冯长磊陈雷张彦龙张拓阎渊海王炳雅
Owner BEIJING MXTRONICS CORP
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