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Gate drive circuit and drive chip including it

A gate drive circuit and low drive voltage technology, applied in static indicators, instruments, etc., can solve the problem of low chip area utilization rate, achieve the effects of area reduction, manufacturing cost reduction, and use efficiency improvement

Active Publication Date: 2022-02-11
APLUS SEMICON TECH CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] The technical problem to be solved by the present invention is: in order to solve the technical problem in the prior art that the layout spacing is set in order to avoid mutual interference between the high-voltage circuit area and the low-voltage circuit area, resulting in low wafer area utilization

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  • Gate drive circuit and drive chip including it
  • Gate drive circuit and drive chip including it
  • Gate drive circuit and drive chip including it

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Embodiment Construction

[0078] The present invention is described in further detail now in conjunction with accompanying drawing. These drawings are all simplified schematic diagrams, which only illustrate the basic structure of the present invention in a schematic manner, so they only show the configurations related to the present invention.

[0079] In the accompanying drawings, the dimensions of various layers, films, panels, regions, etc., may not be drawn to scale for clarity. Throughout the specification, the same reference numerals refer to the same elements. It will be understood that when an element such as a layer, film, region, or substrate is referred to as being "on" or "connected to" another element, it can be directly on or connected to the other element, or Intermediate elements may also be present. In contrast, when an element is referred to as being "directly on" or "directly connected to" another element, there are no intervening elements present. As used herein, "connected" may...

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Abstract

The invention discloses a gate driving circuit, which includes a low-voltage circuit and a high-voltage circuit. The low-voltage circuit outputs the first signal, and the voltage range of the first signal is between the ground voltage and the operating voltage. The high-voltage circuit receives the first signal, and converts the first signal into a gate drive signal, wherein the P-type metal oxide semiconductor field-effect transistor of the high-voltage circuit and the low-voltage circuit includes a common N-type well, and the voltage of the common N-type well is used for operation Voltage. With the present invention, the use efficiency of the wafer area can be improved.

Description

technical field [0001] The invention relates to the technical field of drive circuits, in particular to a gate drive circuit and a drive chip containing the same. Background technique [0002] In the design of the gate driver chip, due to the limitation of the semiconductor manufacturing process, the circuit of the gate driver must be completely divided into a high-voltage circuit area and a low-voltage circuit area. Since the transistor elements used in the two regions are different, a layout spacing needs to be set between the two regions, such as laying out an active region, N-type well, and deep N-type well, etc., to avoid the circuit in the two regions Mutual interference occurs, thereby affecting the operation of the driver chip. [0003] However, setting the layout pitch is not only affected by the semiconductor manufacturing process, but also reduces the utilization efficiency of the chip area, thereby affecting the manufacturing cost of the driving chip. Contents...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G09G3/20G09G3/32G09G3/36
Inventor 蔡水河王国荣
Owner APLUS SEMICON TECH CO LTD