Soi wafer with high heat dissipation performance and preparation method thereof

A high heat dissipation, wafer technology, used in semiconductor/solid-state device manufacturing, semiconductor/solid-state device components, semiconductor devices, etc. problems such as current drop, to achieve the effect of improving utilization, improving heat dissipation, and improving integration

Active Publication Date: 2022-02-11
MICROTERA SEMICON (GUANGZHOU) CO LTD
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  • Application Information

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Problems solved by technology

However, due to the relatively low thermal conductivity of the buried oxide layer, there is a self-heating effect in the high-density integrated SOI circuit, resulting in a decrease in the channel current of the device and the formation of negative differential resistance, which greatly limits the application of semiconductor-on-insulator technology. limit

Method used

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  • Soi wafer with high heat dissipation performance and preparation method thereof
  • Soi wafer with high heat dissipation performance and preparation method thereof
  • Soi wafer with high heat dissipation performance and preparation method thereof

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Embodiment Construction

[0026] Embodiments of the present invention are described below through specific examples, and those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification. The present invention can also be implemented or applied through other different specific implementation modes, and various modifications or changes can be made to the details in this specification based on different viewpoints and applications without departing from the spirit of the present invention.

[0027] For example, when describing the embodiments of the present invention in detail, for the convenience of explanation, the cross-sectional view showing the device structure will not be partially enlarged according to the general scale, and the schematic diagram is only an example, which should not limit the protection scope of the present invention. In addition, the three-dimensional space dimensions of length, width and depth sho...

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Abstract

The invention provides an SOI wafer with high heat dissipation performance and a preparation method thereof. The SOI wafer sequentially comprises: a bulk silicon wafer, a buried oxide layer, and a silicon device layer; A groove with a preset depth is filled with a material with high thermal conductivity, the material with high thermal conductivity is fixed with heat dissipation glue, and the material with high thermal conductivity is carbon nanotube or molybdenum disulfide. By setting grooves in the bulk silicon wafer and filling the grooves with high thermal conductivity materials such as carbon nanotubes or molybdenum disulfide, based on the high thermal conductivity of carbon nanotubes and molybdenum disulfide, it can effectively improve The heat dissipation performance of the SOI circuit makes the size of the SOI wafer larger; in addition, the high thermal conductivity material is set in the bulk silicon wafer, which does not affect the area of ​​the silicon device layer, improves the utilization of the active area, reduces the cost, and improves the integration. Spend.

Description

technical field [0001] The invention relates to the technical field of semiconductor-on-insulator substrates, in particular to an SOI wafer with high heat dissipation performance and a preparation method thereof. Background technique [0002] Due to the advantages of low parasitic junction capacitance and Buried Oxid (BOX) isolation, Silicon-on-Insulator (SOI) technology is widely used in low-power, high-speed and high-reliability integrated circuits. However, due to the relatively low thermal conductivity of the buried oxide layer, there is a self-heating effect in the high-density integrated SOI circuit, resulting in a decrease in the channel current of the device and the formation of negative differential resistance, which greatly limits the application of semiconductor-on-insulator technology. limit. [0003] Therefore, it is necessary to propose an SOI wafer with high heat dissipation performance and a preparation method thereof, so as to effectively improve the heat d...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L23/367H01L27/12H01L23/373H01L21/762
CPCH01L23/367H01L27/1203H01L23/373H01L21/7624
Inventor 刘森刘海彬关宇轩刘兴龙班桂春
Owner MICROTERA SEMICON (GUANGZHOU) CO LTD
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