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Semiconductor device, integrated circuit product, and manufacturing method

A manufacturing method and semiconductor technology, applied in the fields of semiconductor/solid-state device manufacturing, semiconductor devices, semiconductor/solid-state device components, etc., can solve the problems of unsatisfactory MOS devices, damage to semiconductor devices, and systematic failures of integrated circuits. and other problems, to achieve the effect of avoiding electromagnetic damage effect, reducing bias voltage, and breaking through the bottleneck of anti-electromagnetic interference.

Active Publication Date: 2022-02-08
BEIJING CHIP IDENTIFICATION TECH CO LTD +5
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Research on MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor, denoted as MOSFET, referred to as MOS) device damage is a research on electrostatic damage (Electrostatic discharge, ESD), but research on electromagnetic damage to MOS devices has not yet been obtained. Satisfactory progress, especially for CMOS (Complementary metaloxide–semiconductor, CMOS) devices, such as electromagnetic damage of CMOS inverters
In the actual use environment, semiconductor devices are easily exposed to electromagnetic interference. Under electromagnetic interference, some semiconductor devices will be damaged and malfunction, which will further lead to systematic failure of integrated circuits or other equipment.

Method used

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  • Semiconductor device, integrated circuit product, and manufacturing method
  • Semiconductor device, integrated circuit product, and manufacturing method
  • Semiconductor device, integrated circuit product, and manufacturing method

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0107] An embodiment of the present invention provides a semiconductor device, which may include:

[0108] a base body; a first doped region formed in the base body, the first doped region being the doped region of the source region and a drain region of the first MOS; a second doped region formed in the base body, the The distance between the second doped region and the source region is smaller than the distance between the second doped region and the drain region, and the conductivity type of the second doped region is opposite to that of the source region; the interconnection layer has Conductive, in contact with the second doped region and the source region.

[0109] In some implementations, the base body is doped, for example, the base body includes a P-type or N-type substrate (Substrate, sub) or a well region (Well) formed in the substrate. Relative to the base body, the first doped region is heavily doped, and the conductivity type of the first doped region can be opp...

Embodiment 2

[0123] The embodiment of the present invention and embodiment 1 belong to the same inventive concept, and the embodiment of the present invention provides a manufacturing method of a semiconductor device, and the manufacturing method may include:

[0124] forming a first doped region of the base body, the first doped region being the doped region of the source region and the drain region of the first MOS;

[0125] forming a second doped region of the base, the distance between the second doped region and the source region is smaller than the distance between the second doped region and the drain region, and the distance between the second doped region and the The conductivity type of the source region is opposite;

[0126] A conductive interconnect layer is formed in contact with the second doped region and the source region.

[0127] In some specific implementations, the base body, the doped region and the interconnection layer can be implemented with reference to Embodiment...

Embodiment 3

[0144] The embodiment of the present invention and embodiments 1 to 2 belong to the same inventive concept. The embodiment of the present invention provides an inverter, which is a CMOS inverter, and is also a kind of semiconductor device in the foregoing embodiment 1. The CMOS inverter It is an important basic unit in integrated circuits. The inverter can include:

[0145] P-type substrate;

[0146] The first N-type doped region is formed on the P-type substrate, and is used to form the doped regions of the source region and the drain region of the NMOS;

[0147] a first P-type doped region formed on the P-type substrate;

[0148] The distance between the first P-type doped region and the source region is smaller than the distance between the first P-type doped region and the drain region;

[0149] The interconnection layer has conductivity and is in contact with the first P-type doped region and the source region.

[0150] In some implementations, the first N-type doped ...

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Abstract

The invention provides a semiconductor device, an integrated circuit product and a manufacturing method, belonging to the technical field of semiconductor devices. The semiconductor device includes: a base body; a first doped region formed in the base body, the first doped region being the doped region of the source region and the drain region of the first MOS; a second doped region formed in the In the base body, the distance between the second doped region and the source region is smaller than the distance between the second doped region and the drain region, and the conductivity type of the second doped region is opposite to that of the source region ; an interconnection layer having conductivity and in contact with the second doped region and the source region. The invention can provide anti-electromagnetic interference capability for semiconductor devices.

Description

technical field [0001] The present invention relates to the technical field of semiconductor devices, in particular to a semiconductor device, a manufacturing method of a semiconductor device, an inverter, a layout structure, an electronic device, an integrated circuit product and a computer Read storage media. Background technique [0002] With the continuous reduction of the feature size of integrated circuits and corresponding various semiconductor devices, the electromagnetic damage effect is easy to appear in the reduced devices, which often leads to actual damage to the device after the effect occurs. [0003] At present, some studies have been carried out in the industry on the damage effect of PN junction (p–n junction) and bipolar transistor (bipolar junction transistor, BJT). Research on MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor, denoted as MOSFET, referred to as MOS) device damage is a research on electrostatic damage (Electrostatic discharge, ESD...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L27/02H01L27/092H01L23/552H01L21/8238
CPCH01L27/0207H01L27/092H01L23/552H01L21/8238
Inventor 赵东艳成睿琦赵扬陈燕宁董广智王立城付振王树龙罗宗兰
Owner BEIJING CHIP IDENTIFICATION TECH CO LTD
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