Semiconductor device, integrated circuit product, and manufacturing method
A manufacturing method and semiconductor technology, applied in the fields of semiconductor/solid-state device manufacturing, semiconductor devices, semiconductor/solid-state device components, etc., can solve the problems of unsatisfactory MOS devices, damage to semiconductor devices, and systematic failures of integrated circuits. and other problems, to achieve the effect of avoiding electromagnetic damage effect, reducing bias voltage, and breaking through the bottleneck of anti-electromagnetic interference.
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Embodiment 1
[0107] An embodiment of the present invention provides a semiconductor device, which may include:
[0108] a base body; a first doped region formed in the base body, the first doped region being the doped region of the source region and a drain region of the first MOS; a second doped region formed in the base body, the The distance between the second doped region and the source region is smaller than the distance between the second doped region and the drain region, and the conductivity type of the second doped region is opposite to that of the source region; the interconnection layer has Conductive, in contact with the second doped region and the source region.
[0109] In some implementations, the base body is doped, for example, the base body includes a P-type or N-type substrate (Substrate, sub) or a well region (Well) formed in the substrate. Relative to the base body, the first doped region is heavily doped, and the conductivity type of the first doped region can be opp...
Embodiment 2
[0123] The embodiment of the present invention and embodiment 1 belong to the same inventive concept, and the embodiment of the present invention provides a manufacturing method of a semiconductor device, and the manufacturing method may include:
[0124] forming a first doped region of the base body, the first doped region being the doped region of the source region and the drain region of the first MOS;
[0125] forming a second doped region of the base, the distance between the second doped region and the source region is smaller than the distance between the second doped region and the drain region, and the distance between the second doped region and the The conductivity type of the source region is opposite;
[0126] A conductive interconnect layer is formed in contact with the second doped region and the source region.
[0127] In some specific implementations, the base body, the doped region and the interconnection layer can be implemented with reference to Embodiment...
Embodiment 3
[0144] The embodiment of the present invention and embodiments 1 to 2 belong to the same inventive concept. The embodiment of the present invention provides an inverter, which is a CMOS inverter, and is also a kind of semiconductor device in the foregoing embodiment 1. The CMOS inverter It is an important basic unit in integrated circuits. The inverter can include:
[0145] P-type substrate;
[0146] The first N-type doped region is formed on the P-type substrate, and is used to form the doped regions of the source region and the drain region of the NMOS;
[0147] a first P-type doped region formed on the P-type substrate;
[0148] The distance between the first P-type doped region and the source region is smaller than the distance between the first P-type doped region and the drain region;
[0149] The interconnection layer has conductivity and is in contact with the first P-type doped region and the source region.
[0150] In some implementations, the first N-type doped ...
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