Semiconductor structure and preparation method thereof
A technology of semiconductor and alignment direction, which is applied in semiconductor/solid-state device manufacturing, semiconductor devices, semiconductor/solid-state device components, etc. The effect of optimizing engraving process conditions, ensuring alignment accuracy, and simplifying complexity
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[0032] In order to make the purpose, technical solutions and advantages of the embodiments of the present invention clearer, the embodiments of the present invention will be described in detail below with reference to the accompanying drawings. However, those skilled in the art can understand that in each embodiment of the present invention, many technical details are provided for readers to better understand the present application. However, even without these technical details and various changes and modifications based on the following embodiments, the technical solutions claimed in this application can also be realized.
[0033] refer to figure 1 , the semiconductor structure includes: a substrate 100; a first mask layer (not marked) on the substrate 100, the first mask layer has a plurality of discrete first mask patterns 101; A second mask layer (not shown), the second mask layer has a second mask pattern 102 , at least part of the sidewall of the second mask pattern 10...
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