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Array substrate and display panel

A technology for array substrates and display areas, applied in nonlinear optics, instruments, optics, etc., can solve problems such as short circuits and poor quality of display devices, and achieve good quality and prevent short circuits

Inactive Publication Date: 2021-12-21
HKC CORP LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, if the bow-shaped winding is exposed in the output lead bonding (OLB), that is, the bow-shaped winding is not covered by the color filter substrate, and the distance between the bow-shaped winding and the adjacent lead wire is relatively close, it is easy to be caused by process deviation. The electrode on the chip on film (COF) is connected to the lead of the adjacent data line, which causes a short circuit, resulting in poor quality of the display device

Method used

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  • Array substrate and display panel
  • Array substrate and display panel
  • Array substrate and display panel

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0048] The first aspect of the present application provides an array substrate. Please refer to figure 1 , the array substrate 100 includes a chip-on-film (COF) 10 , so that the array substrate 100 is electrically connected to the printed circuit board through the chip-on-film 10 .

[0049] Please also refer to figure 1 and figure 2 , Embodiment 1 of the present application provides an array substrate 100, the array substrate 100 is provided with a display area (active area, AA area) and a peripheral area located around the display area, figure 2 shows the display area edge (AA edge) 203, that is, the area above the display area edge 203 is the peripheral area, and the area below the display area edge 203 is the display area; wherein, the peripheral area includes the fan-out area A and the binding area B, Binding area B is located on the side of fan-out area A away from the display area.

[0050] The array substrate 100 includes a plurality of data lines (data lines) arr...

Embodiment 2

[0068] Please refer to Figure 4 and Figure 5Embodiment 2 of the present application provides an array substrate 100. Similar to Embodiment 1, the array substrate 100 includes a plurality of data lines arranged in the display area, fan-shaped lead structures and a plurality of first The electrode 30; the fan-out lead structure includes a plurality of fan-out leads 21, the two ends of each fan-out lead 21 are respectively connected to a corresponding data line and a first electrode 30, and at least part of the fan-out lead 21 is at one end away from the display area There is a curve segment 211; the array substrate 100 also includes a chip-on-chip film 10, and the chip-on-chip film 10 includes a film substrate and a plurality of second electrodes 12 arranged on the film substrate, wherein at least part of the second electrodes 12 reach the display area The distances are not equal, so that the distance between the second electrode 12 and the corresponding curve segment meets t...

Embodiment 3

[0080] A second aspect of the present application proposes a display panel. Please refer to figure 1 and Figure 7 Embodiment 3 of the present application proposes a display panel 2 , including the array substrate 100 described in the first aspect, and a color filter substrate 200 disposed opposite to the array substrate 100 .

[0081] Wherein, the display panel 2 further includes a liquid crystal layer 400 and a sealant 300 placed between the array substrate 100 and the color filter substrate 200, the array substrate 100 and the color filter substrate 200 are bonded together through the sealant 300, and the sealant 300 is set on Displays the outer peripheral side of the area.

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Abstract

The invention is suitable for the technical field of display, and provides an array substrate which comprises a plurality of data lines arranged in a display area, and a fan-shaped lead structure and a plurality of first electrodes which are arranged in a peripheral area, the fan-shaped lead structure comprises a plurality of fan-out leads, the two ends of each fan-out lead are connected with one corresponding data line and one first electrode respectively, and at least part of the fan-out leads are provided with curved sections at the ends away from the display area. The array substrate further comprises a chip-on-film, the chip-on-film comprises a film base material and a plurality of second electrodes arranged on the film base material, and the second electrodes are connected with the first electrodes in a one-to-one binding mode, wherein the distances from at least part of the second electrodes to the display area are unequal, so that the distances between the second electrodes and the connected curve sections accord with a preset range. The invention further provides a display panel. The array substrate and the display panel can effectively prevent the fan-out lead and the chip on film from being short-circuited, and are good in quality.

Description

technical field [0001] The present application belongs to the field of display technology, and in particular relates to an array substrate and a display panel. Background technique [0002] In the GOA (Gate Driver on Array, Chinese abbreviation: gate driver on the array substrate) circuit drive technology, from the source bonding pad of the data line (source line) to the display area (active area, AA area) ) leads are designed for fanout. In order to make each lead wire have an equal resistance value, there is a practice of designing part of the lead wire as bow-shaped winding in the prior art. However, if the bow-shaped winding is exposed in the output lead bonding (OLB), that is, the bow-shaped winding is not covered by the color filter substrate, and the distance between the bow-shaped winding and the adjacent lead wire is relatively close, it is easy to be caused by process deviation. Electrodes on a chip on film (COF) are connected to adjacent data line leads, thereby...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G02F1/1343G02F1/1362G02F1/1345
CPCG02F1/134309G02F1/136286G02F1/13452
Inventor 胡长珍康报虹
Owner HKC CORP LTD