Negative resistance clamping silicon controlled rectifier memory resistor device and manufacturing method thereof

Abstract

The invention discloses a negative resistance clamping silicon controlled rectifier rectification memristor and a manufacturing method thereof. A DN-Well region is arranged on a substrate P-Sub, and a first P-Well region, an N-Well region and a second P-Well region are arranged in the DN-Well region; a first shallow slot isolation region, a first P + injection region, a second shallow slot isolation region, a first N + injection region, a first polysilicon gate, a third shallow slot isolation region and a second P + injection region are arranged in the first P-Well region, and a fourth shallow slot isolation region stretches across the junction of the first P-Well region and the N-Well region; a second N + injection region, a fifth shallow slot isolation region and a third N + injection region are arranged in the N-Well region; a sixth shallow slot isolation region stretches across the junction of the N-Well region and the second P-Well region; a third P + injection region, a seventh shallow slot isolation region, a second polysilicon gate, a fourth N + injection region, an eighth shallow slot isolation region, a fourth P + injection region and a ninth shallow slot isolation region are arranged in the second P-Well region; in this way, continuous adjustment and control of the high resistance state and the low resistance state are achieved, and the requirement for large-scale on-chip integration of the silicon-based memristor based on the standard microelectronic technology is met.

Description

technical field [0001] The invention relates to the field of integrated circuits, in particular to a negative resistance clamp silicon controlled rectifier memristive device and a manufacturing method thereof. Background technique [0002] The advent of the era of artificial intelligence poses urgent problems for the computing efficiency and capacity of computer core chips. Currently, traditional chips based on the von Neumann architecture are facing severe challenges. In traditional computer architectures, computing and storage functions cannot be unified. With the continuous development of intelligent applications, the demand for data storage has shown explosive growth. In the face of increasingly complex data perception, due to the lack of breakthrough core device structures, research on artificial neural networks and artificial intelligence chips has stagnated. It is difficult for intelligent computing chips to simulate the information storage and operation of the human ...

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Problems solved by technology

[0003] Nanoscale-based TiO 2 Solid-state thin-film two-terminal memristors such as figure 1 As shown, by constructing a boundary mobility model to explain the memristive phenomenon in the device, the device is equivalent to TiO with a thickness of D 2 , there is a highly doped region in the film, and the resistance value is expressed as R ON , a low doped region, the resistance value is denoted as R OFF , the total resistance of the device is equivalent to the sum of the series connection of two resistors, and the length of the high-concentration doped region is represented by the variable W. It is difficult to achieve large-scale on-chip integration with standard microelectronics processes for memristive devices realized by the above materials

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