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Chip test method, device, electronic equipment and computer readable storage medium

A chip testing and computer program technology, applied in CAD circuit design, special data processing applications, etc., can solve the problem of low chip development efficiency, and achieve the effect of improving development efficiency, improving reliability, and reducing development difficulty and error rate.

Pending Publication Date: 2022-01-07
HAINING ESWIN IC DESIGN CO LTD +1
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  • Abstract
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  • Claims
  • Application Information

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Problems solved by technology

[0004] The embodiment of the present application provides a chip testing method, device, electronic equipment, and computer-readable storage medium, which are used to solve the technical problem of low chip development efficiency

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  • Chip test method, device, electronic equipment and computer readable storage medium
  • Chip test method, device, electronic equipment and computer readable storage medium
  • Chip test method, device, electronic equipment and computer readable storage medium

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Embodiment Construction

[0071] Embodiments of the present application are described below with reference to the drawings in the present application. It should be understood that the implementation manner described below in conjunction with the accompanying drawings is an exemplary description for explaining the technical solutions of the embodiments of the present application, and does not limit the technical solutions of the embodiments of the present application.

[0072] Those skilled in the art will understand that unless otherwise stated, the singular forms "a", "an", "said" and "the" used herein may also include plural forms. It should be further understood that the terms "comprising" and "comprising" used in the embodiments of the present application mean that the corresponding features can be implemented as the presented features, information, data, steps, operations, elements and / or components, but do not exclude The realization is other features, information, data, steps, operations, elemen...

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Abstract

The embodiment of the invention provides a chip test method, a device, electronic equipment and a computer readable storage medium, and relates to the field of integrated circuit design. The method comprises the steps of determining original simulation data of a to-be-tested chip and a target test module of the to-be-tested chip; determining target simulation data corresponding to the target test module in the original simulation data; and testing the target test module according to the target simulation data. The embodiment of the invention provides a new chip test method, the software design of the test method is independent of the logic function development of the chip, the consistency of the chip from design to release is ensured, the development efficiency of the chip is improved, and the reliability of a chip test result is ensured by adopting a simulation data post-processing mode.

Description

technical field [0001] The present application relates to the technical field of integrated circuit design, and in particular, the present application relates to a chip testing method, device, electronic equipment and computer-readable storage medium. Background technique [0002] SoC (System on Chip, system on chip) chip is an integrated circuit chip, which can effectively reduce the development cost of electronic / information system products, shorten the development cycle, and improve the competitiveness of products. way of product development. With the emergence of application scenarios such as big data processing, cloud computing, and deep learning, higher and more diverse requirements are put forward for the development and design of SoC chips. [0003] In the prior art, technicians usually develop and design the logic function and test unit of the SoC chip simultaneously based on the RTL (Register Transfer Level) level model using a hardware design language, wherein th...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F30/33
CPCG06F30/33
Inventor 郭向飞
Owner HAINING ESWIN IC DESIGN CO LTD
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