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Semiconductor structure and forming method thereof

A technology of semiconductor and isolation structure, applied in the field of semiconductor structure and its formation

Pending Publication Date: 2022-01-14
SEMICON MFG INT (SHANGHAI) CORP +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] However, the performance of existing FinFETs still needs to be improved, especially the problem of Vt uniformity on the fin surface

Method used

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  • Semiconductor structure and forming method thereof
  • Semiconductor structure and forming method thereof
  • Semiconductor structure and forming method thereof

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Experimental program
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Embodiment Construction

[0044] First, the reasons for the poor performance of existing semiconductor structures are described in detail in conjunction with the accompanying drawings, figure 1 A schematic diagram of a semiconductor structure.

[0045] Please refer to figure 1 , the semiconductor structure includes: a substrate 100 having a fin 110 on the substrate 100, the fin 110 includes an adjacent first region I and a second region II, and the second region II is located in the first region On I; the isolation layer 101 located on the substrate 100, the isolation layer 101 covering part of the sidewall surface of the fin portion 110; the gate structure 120 located on the isolation layer 101 across the surface of the fin portion 110, the The gate structure 120 covers part of the top surface and the sidewall surface of the fin 110 .

[0046] In the above structure, the gate structure 120 can control the opening of the channel. When the voltage applied to the gate structure 120 is greater than the ...

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Abstract

The invention discloses a semiconductor structure and a forming method thereof. The structure comprises a substrate which is provided with a fin part, and the fin part comprises a first region and a second region located on the first region; a first interface layer is included and is located on the surface of the fin part in the first region, polarized atoms are doped in the first interface layer, and the polarized atoms have first concentration; and a second interface layer is included and is located on the surface of the fin part in the second region, the polarized atoms are doped in the second interface layer, the polarized atoms have a second concentration, and the first concentration is different from the second concentration. The first interface layer is positioned in the first region, the second interface layer is positioned in the second region, the difference between the threshold voltage of the gate layer on the top of the fin part and the threshold voltage of the gate layer on the side wall of the fin part can be balanced so that the difference between the threshold voltage of the part, located on the top of the fin part, of the finally formed gate structure and the threshold voltage of the part, located on the side wall of the fin part, of the finally formed gate structure is reduced, and the performance of the formed semiconductor structure is improved.

Description

technical field [0001] The invention relates to the technical field of semiconductor manufacturing, in particular to a semiconductor structure and a forming method thereof. Background technique [0002] With the development of integrated circuits to ultra-large-scale integrated circuits, the circuit density inside the integrated circuit is increasing, and the number of components contained in the integrated circuit is also increasing, and the size of the components is also reduced. As the size of the semiconductor structure decreases, the channel of the device in the semiconductor structure shortens accordingly. Due to the shortening of the channel, the gradual channel approximation is no longer valid, and various unfavorable physical effects (especially the short channel effect) are highlighted, which degrades the performance and reliability of the device and limits the further reduction of the device size. [0003] In order to overcome the short channel effect of the devi...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L29/78H01L21/336H01L29/10
CPCH01L29/785H01L29/7856H01L29/66795H01L29/105
Inventor 金吉松亚伯拉罕·庾
Owner SEMICON MFG INT (SHANGHAI) CORP