Hardware control system of block cipher algorithm
A block cipher algorithm, hardware control technology, applied in transmission systems, digital transmission systems, electrical components, etc., can solve the problems of increasing project time and cost, long hardware algorithm debugging cycle, etc., to achieve easy development and debugging, easy to adapt to adjustment, The effect of shortening the development cycle
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[0054] It should be understood that the specific embodiments described here are only used to explain the present invention, not to limit the present invention.
[0055] In the following description, use of suffixes such as 'module', 'part' or 'unit' for denoting elements is only for facilitating description of the present invention and has no specific meaning by itself. Therefore, 'module', 'part' or 'unit' may be used in combination.
[0056] see Figure 1-18 , in order to achieve the above object, a hardware control system for implementing block cipher algorithm is provided in the first embodiment of the present invention, including: key expansion module KE, process scheduling module PC, input data cache module BFI, round key / configuration Information cache module BFC, n groups of encryption / decryption modules MMn (where n is a positive integer), output management module OC, and output data cache module BFO.
[0057] The key expansion module KE includes the key data input ...
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