Check patentability & draft patents in minutes with Patsnap Eureka AI!

Method, system and device for enabling UPI to be compatible with PCIE on PCB

A PCB board and pin technology, applied in the field of printed circuit board design, can solve problems such as poor PCIE signals, and achieve the effect of ensuring signal integrity and rational use of PCB space

Pending Publication Date: 2022-04-05
SUZHOU LANGCHAO INTELLIGENT TECH CO LTD
View PDF0 Cites 0 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

There is no capacitor at the UPI connector end on the PCB, so the PCIE signal is not good when the two share the wiring and connector

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Method, system and device for enabling UPI to be compatible with PCIE on PCB
  • Method, system and device for enabling UPI to be compatible with PCIE on PCB
  • Method, system and device for enabling UPI to be compatible with PCIE on PCB

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0045] Embodiment 1 of the present invention proposes a method for UPI compatibility with PCIE on a PCB, combining PCIE and UPI routing rules, and UPI high-speed routing on the PCB meets the routing rules of PCIE and UPI at the same time, so that UPI routing can be balanced The PCIE routing function makes reasonable use of PCB space; by customizing the Cable, the capacitor at the PCIE connector end is integrated into the high-speed cable, so that UPI and PCIE can share the same connector on the PCB.

[0046] Among them, PCB: (Printed Circuit Board) is a printed circuit board;

[0047] UPI: (Ultra Path Interconnect) Ultra Path Interconnect;

[0048] PCIE: (peripheral component interconnect express) high-speed serial computer expansion bus.

[0049]The method includes: first redefining the attributes of some UPI pins, so that the differential signals corresponding to some UPI pins are compatible with PCIE signals; the number of some pins is equal to the number of PCIE pins;

...

Embodiment 2

[0065] Based on a method for UPI compatible PCIE on the PCB proposed by Embodiment 1 of the present invention, Embodiment 2 of the present invention proposes a system for UPI compatible PCIE on the PCB, such as Figure 7 It is a schematic diagram of a UPI-compatible PCIE system on a PCB in Embodiment 2 of the present invention, the system includes a definition module and an adjustment module;

[0066] The definition module is used to redefine the attributes of UPI part pins, so that the differential signals corresponding to UPI part pins are compatible with PCIE signals; the number of said part pins is equal to the number of PCIE pins;

[0067] The adjustment module is used to adjust the trace spacing and the surface layer trace length of the UPI part pins corresponding to the differential signal.

[0068] The system also includes custom modules;

[0069] The customized module is used to customize the bifurcated cables connected to the PCB board;

[0070] The first signal in...

Embodiment 3

[0081] Based on a method for UPI compatible PCIE on a PCB board proposed in Embodiment 1 of the present invention, Embodiment 3 of the present invention proposes a device for UPI compatible PCIE on a PCB board, which device includes a PCB board and a custom cable ;Customized cables are used to connect to the PCB board;

[0082] The differential signal corresponding to some pins of UPI on the PCB board is compatible with PCIE signal; and the wiring spacing of some pins of UPI corresponding to the differential signal is 5h mil;

[0083] The customized cable includes a first signal input end, a second signal input end and a signal output end; the first signal input end integrates a capacitor; the first signal input end is a PCIE connector end; the second signal input end is connected to a clock signal; the second signal input terminal is a clock connector; the signal output terminal is connected to the device to be connected.

[0084] A UPI-compatible PCIE device on a PCB propos...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

The invention provides a method, system and device for enabling UPI to be compatible with PCIE on a PCB, and the method comprises the steps: defining the attributes of a part of pins of the UPI, and enabling differential signals corresponding to the part of pins to be compatible with PCIE signals; the number of the partial pins is equal to the number of the PCIE pins; and adjusting the routing distance and the surface routing length of the differential signals corresponding to part of the pins. The method further comprises the steps of customizing a cable connected with the PCB; a first signal input end of the cable is integrated with a capacitor; the first signal input end is a PCIE connector end; a second signal input end of the cable is connected with a clock signal; the second signal input end is a clock connector; the signal output end of the cable is connected with a to-be-connected device. Based on the method, the invention further provides a system and a device for compatibility of the UPI and the PCIE, the PCIE and the UPI routing rule are combined according to the requirement of a high-speed line, so that UPI routing gives consideration to the PCIE routing function, and the space is reasonably utilized.

Description

technical field [0001] The invention belongs to the technical field of printed circuit board design, and in particular relates to a UPI-compatible PCIE method, system and device on a PCB. Background technique [0002] With the advent of the big data era, the requirements for server data processing speed and capacity are increasing. The server is gradually developing from single-way (one CPU) to multi-way (multiple CPUs). And in the PCB functional design, considering the scalability of the CPU, many UPI connectors are often added, so that the CPUs on multiple single-channel motherboards can be connected to a multi-channel motherboard through UPI connectors in the later stage. Meet the needs of different data processing capabilities. But when there is no need for expansion, the UPI function on the single-channel motherboard will be idle, resulting in a waste of PCB board functions and space. [0003] In the prior art, there is no design for making UPI compatible with PCIE o...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
IPC IPC(8): G06F30/394G06F115/12
Inventor 杨天琪
Owner SUZHOU LANGCHAO INTELLIGENT TECH CO LTD
Features
  • R&D
  • Intellectual Property
  • Life Sciences
  • Materials
  • Tech Scout
Why Patsnap Eureka
  • Unparalleled Data Quality
  • Higher Quality Content
  • 60% Fewer Hallucinations
Social media
Patsnap Eureka Blog
Learn More

Browse by: Latest US Patents, China's latest patents, Technical Efficacy Thesaurus, Application Domain, Technology Topic, Popular Technical Reports.

© 2025 PatSnap. All rights reserved.Legal|Privacy policy|Modern Slavery Act Transparency Statement|Sitemap|About US| Contact US: help@patsnap.com