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Semiconductor substrate and manufacturing method thereof, and semiconductor device structure and manufacturing method thereof

A manufacturing method and device structure technology, applied in the direction of semiconductor devices, semiconductor/solid-state device manufacturing, semiconductor/solid-state device components, etc., can solve problems such as tip discharge and static charge cannot be exported, and achieve the goal of preventing tip discharge and facilitating manufacturing Effect

Pending Publication Date: 2022-05-06
NINGBO SEMICON INT CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] The invention discloses a semiconductor substrate and its manufacturing method, a semiconductor device structure and its manufacturing method, which can solve the problem that the static charge generated during the etching process cannot be solved due to the existence of the insulating layer when a substrate with an insulating layer is used Tip discharge problems caused by exporting

Method used

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  • Semiconductor substrate and manufacturing method thereof, and semiconductor device structure and manufacturing method thereof
  • Semiconductor substrate and manufacturing method thereof, and semiconductor device structure and manufacturing method thereof
  • Semiconductor substrate and manufacturing method thereof, and semiconductor device structure and manufacturing method thereof

Examples

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Embodiment 1

[0041] Embodiment 1 of the present invention provides a semiconductor substrate, figure 1 Shows a schematic structural diagram of the semiconductor substrate of Example 1, please refer to figure 1 , the semiconductor substrate includes from bottom to top:

[0042] stacked substrate layer 10, insulating layer 11 and semiconductor layer 12;

[0043] The projections of the insulating layer 11 and the semiconductor layer 12 on the surface direction of the substrate layer 10 are located within the boundary of the substrate layer 10;

[0044] The static ring 20 surrounds the outer circumference of the insulating layer 11 and the semiconductor layer 12, and the inner wall of the static ring 20 is at least partially connected to the outer wall of the semiconductor layer 12, and the bottom of the static ring 20 extending to the substrate layer 10;

[0045] The semiconductor substrate includes a device area and a non-device area, and the electrostatic ring is arranged on the non-devi...

Embodiment 2

[0052] Embodiment 2 provides a semiconductor device architecture, figure 2 A schematic diagram showing the structure of the semiconductor device of Embodiment 2, please refer to figure 2 , the semiconductor device structure includes: the semiconductor substrate in Embodiment 1, and also includes:

[0053] a micro device 16 formed in the semiconductor layer 12;

[0054] a dielectric layer 14, located on the semiconductor layer 12 and covering the micro-device 16;

[0055] The conductive interconnection structure 15 is disposed in the dielectric layer 14 and connected to the electrostatic ring 20 .

[0056] For the structure and materials of the semiconductor substrate, refer to Embodiment 1, and details will not be repeated here. The micro device 16 can be a transistor, such as a diode, a triode or a MOS transistor. In this embodiment, the micro device 16 is a MOS transistor, wherein the source and drain of the MOS transistor are formed in the semiconductor layer 12 , and...

Embodiment 3

[0058] Embodiment 3 provides a method for manufacturing a semiconductor substrate, comprising the following steps:

[0059] S01: providing a first substrate, the first substrate including a substrate layer, an insulating layer and a semiconductor layer stacked in sequence from bottom to top;

[0060] S02: removing the first substrate with a set width and thickness inwardly from the boundary of the first substrate to form a depression at the edge of the first substrate, the bottom surface of the depression extends to the substrate layer;

[0061] S03: Form an electrostatic ring at the recess, the top surface of the electrostatic ring is higher than the bottom surface of the semiconductor layer, and is at least partially in contact with the semiconductor layer.

[0062] It should be noted that the SON in this specification does not represent the sequence of the manufacturing process.

[0063] Figure 3 to Figure 7 A schematic structural diagram corresponding to different steps...

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Abstract

The invention provides a semiconductor substrate and a manufacturing method thereof, and a semiconductor device structure and a manufacturing method thereof, and the semiconductor substrate comprises a substrate layer, an insulating layer and a semiconductor layer which are stacked from bottom to top. The projections of the insulating layer and the semiconductor layer in the surface direction of the substrate layer are located in the boundary of the substrate layer; the electrostatic ring surrounds the peripheries of the insulating layer and the semiconductor layer, the inner side wall of the electrostatic ring is connected with the outer side wall of the semiconductor layer, and the bottom of the electrostatic ring extends to the substrate layer; the semiconductor substrate comprises a device region and a non-device region, and the electrostatic ring is arranged in the non-device region. According to the invention, the electrostatic ring for connecting the substrate layer and the semiconductor layer is formed at the peripheries of the insulating layer and the semiconductor layer of the semiconductor substrate, so that electrostatic charges generated in the semiconductor layer in a subsequent etching process can enter the substrate layer through the electrostatic ring, and point discharge is prevented.

Description

technical field [0001] The invention relates to the field of semiconductor device manufacturing, in particular to a semiconductor substrate and a manufacturing method thereof, a semiconductor device structure and a manufacturing method thereof. Background technique [0002] Semiconductor devices are used in a variety of electronic applications, such as personal computers, cell phones, digital cameras, and other electronic equipment. Semiconductor devices are generally fabricated by sequentially depositing an insulating or dielectric layer, a conductive layer, and a semiconductor material layer over a semiconductor substrate, and then patterning the various material layers using photolithography to form circuit components and elements thereon. [0003] Compared with traditional bulk silicon, silicon-on-insulator (SOI) materials have the following advantages: 1. It can realize the dielectric isolation of components in integrated circuits, and completely eliminate the parasitic...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L23/60H01L27/12H01L21/84
CPCH01L27/1203H01L23/60H01L21/84H01L27/12
Inventor 黄河汪新学徐海瑛王敬平
Owner NINGBO SEMICON INT CORP