Semiconductor structure and forming method thereof

Abstract

The invention provides a semiconductor structure and a forming method thereof, and the method comprises the steps: providing a substrate which comprises a substrate front surface and a substrate back surface, and the substrate front surface and the substrate back surface are each sequentially provided with a dielectric layer and a bonding layer in a stacked manner; an isolation structure is formed on the front face of the substrate, the isolation structure penetrates through the attaching layer and the dielectric layer and extends into the substrate, and the isolation structure covers the surface of the attaching layer; forming buffer layers on the surfaces of the isolation structures and the surfaces of the bonding layers on the back surface of the substrate; removing the buffer layer, the bonding layer and the isolation structure higher than the dielectric layer on the front surface of the substrate; forming gate material layers on the surfaces of the dielectric layer and the isolation structure on the front surface of the substrate and the surface of the buffer layer on the back surface of the substrate; and taking the buffer layer and the gate material layer on the back surface of the substrate as protective layers, and executing subsequent processes in the logic device region. According to the technical scheme, the bonding layer can be protected from being damaged, the integrity of the bonding layer is ensured, and the performance and the yield of the logic wafer are improved.

Description

technical field [0001] The present application relates to the field of semiconductor technology, in particular to a semiconductor structure and a method for forming the same. Background technique [0002] The back-illuminated CMOS (Complementary Metal Oxide Semiconductor) image sensor solves the problem of metal wiring blocking and reflecting incident light in the early front-illuminated CMOS image sensor, and has attracted widespread attention. In order to further reduce the size of the chip and improve the image quality, the researchers improved the back-illuminated structure and designed a three-dimensional stacked back-illuminated CMOS image sensor, which can separate the image area from the circuit, further improve the image quality, reduce the Noise, making its performance more optimized. [0003] In order to successfully manufacture a three-dimensional stacked back-illuminated CMOS image sensor, it is necessary to perform some special processes on the back of the waf...

AI Technical Summary

Problems solved by technology

There are still certain defects in the crystal back treatment process of the prior art, for example, silicon nitride (SiN) is grown on the crystal back of polysilicon (Poly-Si), offset spacer (Offset spacer) or side wall (Spacer) process, Its time and cost will increase; in the back-end process of wafer production, the device carrying the wafer directly contacts SiN, thereby causing surface defects (defects); the electrostatic suction seat (E-chuck) of the back-end machine ) is difficult to hold the wafer, leading to a risk of chipping

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