Semiconductor structure and forming method thereof
A semiconductor and nucleation technology, applied in the fields of semiconductor devices, semiconductor/solid-state device manufacturing, semiconductor/solid-state device components, etc., can solve the problems affecting the reliability of interconnect lines, product yield, etc., to reduce voids and improve uniformity Effect
Pending Publication Date: 2022-05-27
HUA HONG SEMICON WUXI LTD
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Problems solved by technology
However, as the feature size of integrated circuits continues to shrink, especially when it enters the nanometer stage, there are many defects in the copper interconnects made by the Damascus process, and these defects directly affect the reliability of the interconnects and the yield of products.
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[0026] It should be noted that "surface" and "upper" in this specification are used to describe the relative positional relationship in space, and are not limited to whether they are in direct contact.
[0027] As described in the background art, the existing copper interconnection process needs to be further improved. The analysis and description will now be carried out in conjunction with specific embodiments.
[0028] Figure 1 to Figure 2 It is a cross-sectional schematic diagram of the formation process of a semiconductor structure.
[0029] Please refer to figure 1 , providing a substrate 101; forming a dielectric layer 102 on the substrate 101, the dielectric layer 102 has a trench 103 and a through hole 104 located under the trench 103, the through hole 104 and the trench The grooves 103 communicate with each other and expose the surface of the substrate 100 .
[0030] Please refer to figure 2 , forming a barrier layer 105 on the sidewalls and bottom surfaces of ...
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Abstract
The invention discloses a semiconductor structure and a forming method thereof. The method comprises the following steps: providing a substrate; a dielectric layer is formed on the substrate, a through hole is formed in the dielectric layer, and the bottom of the through hole is exposed out of the substrate; a barrier layer, a nucleation liner layer located on the surface of the barrier layer and a seed crystal layer located on the nucleation liner layer are formed on the side wall and the bottom of the through hole, crystal grains of the nucleation liner layer have a first particle size, crystal grains of the seed crystal layer have a second particle size, and the first particle size is smaller than the second particle size; and forming a conductive layer filling the through hole on the surface of the seed crystal layer. The nucleation liner layer improves the uniformity of the seed crystal layer, and the increase of the nucleation uniformity facilitates the improvement of the quality of the conductive layer and facilitates the reduction of the probability of generation of bad defects such as gaps.
Description
technical field [0001] The present invention relates to the field of semiconductor manufacturing, in particular to a semiconductor structure and a method for forming the same. Background technique [0002] With the continuous improvement of chip integration, copper has replaced aluminum as the mainstream interconnect technology in VLSI manufacturing. Compared with aluminum, copper has the characteristics of low resistivity and good resistance to electric mobility. Therefore, a circuit using copper as an interconnection wire has low power consumption, small parasitic capacitance, small signal interference, fast signal transmission speed, and high reliability. [0003] Since the etching of copper is very difficult, the copper interconnect adopts a dual embedded process, also known as a dual Damascene process. The damascene process is further divided into a single damascene process and a dual damascene process, the difference between the two is whether the through-hole and th...
Claims
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IPC IPC(8): H01L23/532H01L21/768H01L23/528
CPCH01L23/53266H01L23/53228H01L21/76847H01L21/7685H01L23/5283
Inventor 邢中豪梁金娥
Owner HUA HONG SEMICON WUXI LTD