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Gate blocking protecting circuit for integrated circuit with more power supplies and its method

A technology for protecting circuits and latches, which is applied to circuits, electrical components, and electrical solid-state devices, and can solve problems such as latch-up effects and large-area integrated circuits

Inactive Publication Date: 2004-12-22
WINBOND ELECTRONICS CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, the aforementioned forward bias phenomenon caused by the asynchronous supply of multiple power supplies does not only occur at a single CMOS circuit, but any circuit that receives this multiple power supply voltage may cause latch-up due to forward bias.
In other words, if you want to avoid the latch-up phenomenon, you must set a separate guard ring for each CMOS circuit, but the huge area it requires will be a taboo in integrated circuit design

Method used

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  • Gate blocking protecting circuit for integrated circuit with more power supplies and its method
  • Gate blocking protecting circuit for integrated circuit with more power supplies and its method
  • Gate blocking protecting circuit for integrated circuit with more power supplies and its method

Examples

Experimental program
Comparison scheme
Effect test

no. 1 example

[0034] FIG. 4 is a circuit diagram of the first preferred embodiment of the latch protection circuit of FIG. 3. FIG. In Figure 4, the comparison control circuit 30 includes two inverters 301 and 302, and two resistors 303 and 304. Among them, the inverter 301 is through V DDH With V SS The power supply line provides power, and the inverter 302 passes through the V DDL With V SS The power supply line provides power. Resistors 303 and 304 are connected in series by V DDH With V SS Between the power supply lines, the resistors 303 and 304 form a circuit node 34. The inverter 301 is connected to the circuit contact 34 with its input end, and is connected to the input end of the inverter 302 with its output end, which is the circuit contact 35. The output terminals of the inverter 301 and the inverter 302 respectively output control signals CP1 and CP2.

[0035] The switch circuits 31 and 32 shown in FIG. 4 are implemented by pMOS transistors 311 and 321, respectively. Among them, the ...

no. 2 example

[0041] Figure 5 is a circuit diagram of the second preferred embodiment of the latch protection circuit of Figure 3; In Fig. 5, the comparison control circuit 30 includes two inverters 305 and 306, and four resistors 307, 308, 309, 310 and so on. Among them, the inverter 305 passes through V DDH With V SS The power supply line provides power, and the inverter 306 passes through the V DDL With V SS The power supply line provides power. The resistors 307 and 304 are connected in series with the output terminal of the inverter 306 and V SS Between the power supply lines, the resistors 303 and 304 form a circuit contact 36, and the inverter 301 is connected to the circuit contact 36 with its input terminal. The resistors 309 and 310 are connected in series with the output terminal of the inverter 305 and V SS Between the power supply lines, the resistors 303 and 304 form a circuit contact 37, and the inverter 306 is connected to the circuit contact 37 with its input terminal. The outp...

no. 3 example

[0049] FIG. 6 is a circuit diagram of the third preferred embodiment of the latch protection circuit of FIG. 3. FIG. In FIG. 6, the comparison control circuit 30 includes a differential amplifier 331, that is, two inverters 332 and 333, and so on. Among them, the differential amplifier 331 and the inverter 332 are connected via V DDL With V SS The power supply line provides power, and the inverter 333 passes through the V DDH With V SS The power supply line provides power. The differential amplifier 331 is connected to V with an inverting input terminal DDL Power supply line, connect to V with non-inverting input terminal DDH Power supply line. The differential amplifier 331 is connected to the input terminal of the inverter 332 with its output terminal, and the inverter 332 is connected to the input terminal of the inverter 333 with its output terminal. Accordingly, the output terminal of the inverter 332 outputs the control signal CP1, and the output terminal of the inverter 333...

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Abstract

A latching protection circuit is suitable for an integrated circuit whose power source is provided by a first power line and a second power line. The integrated circuit possesses at least a bulk of semiconductor with the same conductive type. The latching protection circuit has a comparison control circuit and a switch circuit. The comparison control circuit is connected to the first power line and the second power line. With relative voltage between the first power line and the second power line detected, the comparison control circuit generates the first control signal and the second control signal. The switch circuit is connected to the first power line and the comparison control circuit. When the value of the relative voltage is higher than a first preset value, based on the first control signal, the switch circuit makes the coupling of the first power line to the bulk of semiconductor.

Description

Technical field [0001] The present invention relates to integrated circuit technology, in particular to a latch protection circuit suitable for multi-power supply integrated circuits and a method thereof to prevent the latch up effect caused by non-simultaneous activation of multiple power sources. Background technique [0002] Since integrated circuits have different voltage requirements in different periods, a single integrated circuit chip may have multiple power supply types in consideration of supporting multiple uses and compatibility. For example, the input / output drive circuit of a CMOS integrated circuit uses a relatively high voltage (for example, 5V), while internal circuits such as memory cells and sense amplifiers use a relatively low voltage (for example, 3.3V). [0003] Please refer to FIG. 1, which shows a schematic cross-sectional view of a CMOS integrated circuit fabricated on a semiconductor substrate 5 in a known multi-power supply integrated circuit. Since th...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L27/00
Inventor 林锡聪俞大立彭永州
Owner WINBOND ELECTRONICS CORP
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