Shallow junction shield groove technique for protecting active region area

Abstract

This invention relates to a new STI process to protect the source area. With the integration degree rapidly increase, people integrates multiple circuits and devices in one chip. In order to ensure the core logic circuit high property and increases the capacity and density of the memory, this invention provides a new STI process to distinguish the high density silicon area and the silicon pad need to be improved.

Description

technical field [0001] The invention belongs to the technical field of integrated circuit technology, and in particular relates to a new STI technology for protecting the area of ​​an active region. Background technique [0002] In today's advanced semiconductor process technology, shallow junction isolation trench (STI) technology is the most important and most difficult process module in the front-end process. Although this module process has been widely used in the advanced semiconductor manufacturing process technology of 0.25 micron and below, its process method is also continuously improved and developed with the continuous upgrading of process technology. The basic technical requirement for STI is: when a large number of transistors and other devices are integrated into smaller and smaller chips, it can play a good role in insulating and isolating each tiny device without affecting these devices. device operating characteristics. In fact, when people carve fine STI ...

AI Technical Summary

Problems solved by technology

However, although such a pull-back process improves the corner shape of STI and makes it round, it inevitably reduces the effective area of ​​the active region. A retreat will seriously affect the high density and critical dimension (CD) control of the device, especially for high-density devices such as memories.

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