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Circuit design checking and error diagnosis method containing black box

A technology for circuit design and verification methods, applied in circuits, calculations, electrical components, etc., can solve the problems of complex calculation, poor error detection ability, waste of computing resources, etc., to save computing resources, improve accuracy, and reduce computing complexity. Effect

Active Publication Date: 2007-02-14
INST OF COMPUTING TECH CHINESE ACAD OF SCI
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Problems solved by technology

[0009] Aiming at the problems of complex calculation, poor error detection ability of the above-mentioned traditional algorithm, need to modify the circuit structure, and waste of computing resources, the present invention proposes a circuit design verification and error diagnosis method including a black box to simplify the complexity of algorithm calculation and improve Algorithmic performance and error detection capabilities, saving computing resources

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  • Circuit design checking and error diagnosis method containing black box
  • Circuit design checking and error diagnosis method containing black box
  • Circuit design checking and error diagnosis method containing black box

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Embodiment Construction

[0046] To illustrate our approach, some basic concepts are first introduced. The satisfiability problem (SAT) refers to finding a variable assignment such that a given Boolean function is satisfiable, or proving that such an assignment does not exist. For the convenience of solving, SAT problems often use the Conjunctive Normal Form (CNF) formula. A CNF formula is a set of clauses, each clause in the set is a disjunction of some variables or their negations (called literals). The CNF formula of a logic circuit is a collection of CNF formulas for each gate, and the CNF formula for each gate is easy to derive. For example, an AND gate a=bc can be expressed as (b+a)(c+a)(b+c+a), which contains three clauses. A black box refers to a functional module in a circuit whose internal implementation or function is unknown. Verifying a design with a black box means verifying that the implementation in the design outside the black box functions correctly. The method main idea that ...

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Abstract

The invention relates to a very large scale integrated circuit design and error diagnosing technology field which is an effective circuit design testing and error diagnosing technology field containing black box. The method uses parallel logic to simulate and test the design of the black box, then uses bool comparison reinforcing simulation algorithm based on satisfaction. It includes two core steps: the first step is parallel logic simulation, the second step is the bool comparison based on satisfaction. The main character is: 1) uses the standard circuit deficiency test to integrate the design of parallel simulation containing black box, it uses two bool (0 and 1) to code each circuit signal. 2) In the bool comparison process based on satisfaction, uses CNF to represent the unknown restrains. 3) The method needs no large design test. 4) The method can upgrade the accuracy of design error diagnosis.

Description

technical field [0001] The invention relates to the technical field of design verification and error diagnosis of VLSI, and proposes an effective method for circuit design verification and error diagnosis including a black box. This method combines logic simulation and Boolean satisfiability algorithm to verify the circuit design including black boxes. Its computational complexity is much lower than traditional algorithms, and it has strong error detection ability, which can further enhance the confidence of designers. The method can also be directly applied to improve the accuracy of error diagnosis. Background technique [0002] With the increasing complexity of VLSI design functions, design methods based on IP (intellectual property) are becoming more and more popular. Due to the protection of intellectual property rights, the internal structure or function of IP modules from third parties is often unknown. Furthermore, during design, there are often certain module func...

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/82H01L21/66G06F17/50
Inventor 李光辉李晓维
Owner INST OF COMPUTING TECH CHINESE ACAD OF SCI
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