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Structure and circuit of logarithmic skip adder

A technology of adding structure and adder, which is used in circuits, instruments, electrical components, etc.

Inactive Publication Date: 2002-07-24
PEKING UNIV
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Either solution requires an additional level of logic delay on the critical path

Method used

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  • Structure and circuit of logarithmic skip adder
  • Structure and circuit of logarithmic skip adder
  • Structure and circuit of logarithmic skip adder

Examples

Experimental program
Comparison scheme
Effect test

Embodiment

[0069] Embodiment: Further explanation is carried out below in conjunction with embodiment.

[0070] figure 1 It is a 32-bit log jump adder structure. This structure divides 32 bits into 5 groups. The carry skip algorithm is used between groups, and the ELM tree addition structure is used in the group, so that the carry transfer in the group is realized in parallel. The logic level of the critical path is logarithmic to the number of bits in the group. relation. Thereby overcoming the limitation of the speed brought by the serial carry in the traditional carry-skip adder group. The ELM structure of each group is as follows figure 2 , image 3 , Figure 4 , Figure 5 shown.

[0071] Compared with other tree structures, the ELM adder embeds the summation logic into the tree structure, so that after obtaining the carry of the previous stage, only one logic gate delay is needed to obtain the sum of each bit and the carry of the next stage. But other tree structures need t...

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PUM

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Abstract

The invention relates to a circuit of digital adder in binary. The carry skipping algorithm is used between grups and the ELM tree type adding structure is used inside group in the circuit. Adopting new carry combination structure makes the initial carry embed into the carry chain so as to realize transferring parallel carry within group. The relationship between the delay of key path and number of bits within group is logarithmic. The invented circuit structure has advantages of the adder produced with small area and quick speed, simple connecting wire, easy to be integrated. The invention can implement binary add operation in 32 bits and 16 bits effectively.

Description

[0001] Technical Field: The present invention relates to the field of integrated circuit design. Background technique: [0002] Binary addition is the most complicated operation in the microprocessor ALU (arithmetic logic unit), and is the key to determine the speed of ALU operation. Currently commonly used algorithms and structures include Carry LookaheadAdder, Carry SkipAdder, and Tree-StructuredAdder, such as "IEEE Transactions on Circuits and Systems-II: Analog and Digital Signal Processing, Vol.43, No.10, October 1996, ELM tree structure adder in "Area-Time-PowerTradeoffs in Parallel Adders". Carry-look-ahead adder is faster, but hardware overhead; carry-skip structure It saves area, but the speed is limited, and it is not suitable for addition operations above 16 bits; while the tree adder has defects in fan-out or connection complexity. Commonly used circuit implementations are static, dynamic, asynchronous, etc. The static circuit is based on Its easy design, low powe...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F7/00H01L21/70H01L27/00
Inventor 吉利久贾嵩王迎春刘凌兰景宏张钢刚傅一玲
Owner PEKING UNIV
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