Method for dipositing high-dielectric constant material on chip using atomic layer diposition method

A kind of atomic layer deposition and substrate technology, applied in metal material coating process, coating, circuit, etc., can solve the problems of occupying space, hindering single layer deposition, low dielectric constant, etc.

Inactive Publication Date: 2003-02-12
SHARP KK
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

One problem with using high-k materials is the formation of interfacial silica or silicate layers with lower dielectric constants during standard processing
Large ligands also take up enough space, and steric hindrance prevents uniform monolayer deposition

Method used

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  • Method for dipositing high-dielectric constant material on chip using atomic layer diposition method
  • Method for dipositing high-dielectric constant material on chip using atomic layer diposition method
  • Method for dipositing high-dielectric constant material on chip using atomic layer diposition method

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Embodiment Construction

[0013] figure 1 is to illustrate the deposition of HfO 2 or ZrO 2 Flowchart of the thin film method steps. Step 110 provides a semiconductor substrate within an ALD chamber. Commercial ALD tools are currently available. An ALD tool, type F120, manufactured by Microchemistry Ltd. of Finland (now a division of ASM), can be used in the methods described herein. In a preferred embodiment, the semiconductor substrate has a hydrogen-terminated silicon surface. Although the method described here is particularly suitable for addressing the deposition of HfO on hydrogen-terminated silicon surfaces 2 or ZrO 2 problem, but it is also perfectly possible to use this method on other surfaces, including silicon dioxide, silicon oxynitride, SiGe surfaces and surfaces such as ZrSiO 4 and HfSiO 4 Depositing HfO on such a silicate 2 or ZrO 2 .

[0014] The semiconductor substrate is heated to a certain temperature to form the atomic layer deposition range. For example, when using anh...

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Abstract

Methods of forming hafnium oxide, zirconium oxide and nanolaminates of hafnium oxide and zirconium oxide are provided. These methods utilize atomic layer deposition techniques incorporating nitrate-based precursors, such as hafnium nitrate and zirconium nitrate. The use of these nitrate based precursors is well suited to forming high dielectric constant materials on hydrogen passivated silicon surfaces.

Description

Background of the invention [0001] The present invention relates to a method of manufacturing an integrated circuit (IC), in particular to a method of forming a high dielectric constant (k) material on silicon. [0002] Current Si VLSI technology uses silicon dioxide as the gate dielectric in MOS devices. As device dimensions continue to be miniaturized, the thickness of the silicon dioxide layer must also be reduced to maintain the same capacitance between the gate region and the channel region. Thicknesses of less than 2 nanometers (nm) are expected in the future. However, the large tunneling currents that occur through such a thin silicon dioxide layer necessitate consideration of other materials. Materials with high dielectric constants can make the gate dielectric layer thinner, thereby alleviating the problem of tunneling current. These so-called high-k dielectric films are defined herein as having a large dielectric constant relative to silicon dioxide. Silicon diox...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/31C23C16/40C23C16/44C23C16/455H01L21/316H01L29/78
CPCC23C16/45529H01L21/31604C23C16/405H01L21/02189H01L21/02205H01L21/02181H01L21/0228H01L21/022H01L21/31B82Y40/00
Inventor Y·奥诺庄维伟R·索兰基
Owner SHARP KK
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