Semiconductor memory device with data bus scheme for reducing high frequency noise

Abstract

A semiconductor memory device includes memory modules which have memories and a data bus which transfers data to the memory modules, in which the data bus comprises a low frequency band data pass unit which removes the high frequency component of the data and sends the data to the memory modules. The low frequency band data pass unit comprises a plurality of stubs which are connected to the data bus in parallel and are formed as printed circuit board (PCB) patterns. The low frequency band data pass unit comprises a plurality of plates that are connected to the data bus in parallel and are formed as PCB patterns. The low frequency band data pass unit has a shape in which parts having a wide width and parts having a narrow width are alternately connected. Therefore, without adding a separate passive device, the semiconductor memory device reduces the high frequency noise of data transferred through a data bus such that the voltage margin of the data improves, the cost for passive devices such as capacitors, is reduced, and the process for attaching the passive devices is simplified.

Description

[0001] This application claims priority to Korean Patent Application 35 U.S.C. §119 filed June 4, 2002 with Application No. 2002-31410, the contents of which are hereby incorporated by reference for various purposes All references. technical field [0002] The present invention relates to a semiconductor memory, and more particularly, to a semiconductor memory having a data bus structure so as to reduce high-frequency noise of data and allow only low-frequency data to pass through. Background technique [0003] Semiconductor memory has been developing towards high integration and high capacity based on high integration, and central processing units (CPUs), which are the core of computer systems, are mainly developing towards high computing speed. [0004] Accordingly, the difference between the operating speeds of CPUs and memories continues to increase, making memory operating speeds a major factor limiting the performance of computer systems. [0005] In addition, in line...

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Problems solved by technology

Although this approach reduces the drop in signal voltage caused by the series resistance used for channel matching, this approach requires a complex manufacturing process to add capacitance in parallel to the channel

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