Manufacturing method of dielectric layer

Abstract

The invention is a dielectric layer making method, placing a substrate in a furnace tube and developing a silicon oxide layer on the substrate, then converting the silicon oxide layer into a silicon oxynitride layer, then, developing a silicon oxide layer on the silicon oxynitride, and a silicon oxynitride/silicon nitride/silicon oxide overlapped layer dielectric layer on the substrate. The technique is completed in the same furnace tube.

Description

technical field [0001] The invention relates to a method for manufacturing a dielectric layer applied on a semiconductor element, and in particular to a method for manufacturing a capacitor dielectric layer. Background technique [0002] When the integration level of the entire semiconductor device is getting higher and higher, the area of ​​the storage unit of the Dynamic Random Access Memory (DRAM) is also getting smaller and smaller. Therefore, how to increase the charge storage capacity of the capacitor in the DRAM memory unit in a limited area has become an important issue. [0003] In general, methods to increase the charge storage capacity of capacitors include increasing the area of ​​the capacitor, reducing the thickness of the dielectric layer of the capacitor, and using dielectric materials with high dielectric constants. However, increasing the area of ​​the capacitor will reduce the integration of DRAM; reducing the thickness of the capacitor dielectric layer i...

AI Technical Summary

Problems solved by technology

However, the silicon nitride / silicon oxide / silicon nitride (NON) stacked dielectric layer has a large leakage current, and the process of making this silicon nitride / silicon oxide / silicon nitride (NON) stacked dielectric layer The steps are more complicated

[0007] For silicon nitride / silicon oxide (NO) stack dielectric layer (Si / N / O), since the interface of silicon / silicon nitride is worse than that of silicon / silicon oxide, that is, the interface of silicon / silicon nitride The interface defect density is higher than that of silicon / silicon oxide, so it will also generate a large leakage current, which will cause the performance of the capacitor to deteriorate

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