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Digital signal processor with a repeatable switching buffer memory

A digital signal and processor technology, applied in the field of digital signal processors, can solve the problems of waste, singleness, and inability to know the exact content of the cache, and achieve the effect of increasing flexibility and improving cost performance.

Inactive Publication Date: 2004-08-18
上海领微科技有限公司 +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, if the nature of the on-chip memory cache is preserved, the program cannot know the exact content of the cache, so it cannot be accessed correctly
In the original general design, the cache can only have a single function, so when running a very small program, the design of the cache plus external storage will be wasteful

Method used

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  • Digital signal processor with a repeatable switching buffer memory
  • Digital signal processor with a repeatable switching buffer memory
  • Digital signal processor with a repeatable switching buffer memory

Examples

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Embodiment Construction

[0010] figure 1 It is a block diagram of the digital signal processor involved in the present invention, which mainly describes the connection relationship of each component module of the overall digital signal processor. Such as figure 1 As shown, the digital signal processor core 5 has a program control unit 1, an address generator unit 2, an instruction decoding unit 3, and a digital data processing unit 4, and the digital data memory 6 and the digital signal processor core 5 constitute the entire digital signal processing unit. device. The instruction decoding unit 3 translates the instruction code into the control signal representing the meaning of the instruction inside the digital signal processor core 5, and these described control signals are connected to the program control unit 1, and the program control unit 1 sends the address generation unit 2, the instruction translation The code unit 3 and the digital data processing unit 4 send out the control signals needed...

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PUM

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Abstract

A digital signal processor with switching over buffers mainly comprises a program control unit, an address generator unit, an instruction decoding unit, a digital data processing unit, an inner-chip digital data storage device, an outer-chip digital data storage device, a selector and a hit judgment logic equipment. The invention improves the existing buffer design, only by a the arrangement of a port, the buffer on the chip can be modified into conventional on chip internal memory, which enables accurate and efficient internal memory access operation when executing small programs.

Description

technical field [0001] The invention relates to a digital signal processor, in particular to a digital signal processor with a reswitchable buffer, belonging to the technical field of digital signal processing. Background technique [0002] The program of modern digital signal processing is getting bigger and bigger. If all the programs are read into the on-chip memory at one time, a lot of on-chip memory is needed, so that the very large chip area increases the cost a lot. But if off-chip memory is used, since off-chip memory requires more read and write cycles than on-chip memory, the efficiency of program operation will be very low. In order to solve the contradiction between efficiency and cost, a cache device is used in some modern digital signal processors (DSP). In 1987, "1987 IEEE International Solid State Circuits Conference (1987 IEEE International Solid State Circuits Conference)" published by the International Electrical Society IEEE published "A 60 ns CMOS DSP ...

Claims

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Application Information

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IPC IPC(8): G06F9/30G06F12/00G06F13/14
Inventor 陈进
Owner 上海领微科技有限公司
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