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Montgomery modular multiplier and method thereof

A multiplier and modulus technology, which is applied in the field of Montgomery modulus multipliers, can solve problems such as consumption, and achieve the effect of reducing calculation operations and power consumption

Inactive Publication Date: 2004-12-01
SAMSUNG ELECTRONICS CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

The devices that add the computation consume a lot of power, and most of the power is consumed by the modulus multiplication
In particular, more power is required in modulo operations as the bit length increases

Method used

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  • Montgomery modular multiplier and method thereof
  • Montgomery modular multiplier and method thereof
  • Montgomery modular multiplier and method thereof

Examples

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Embodiment Construction

[0047] The following description of the exemplary embodiments is merely illustrative in nature and is not meant to limit the invention, its application or uses.

[0048] figure 2 is a diagram of an analog-to-digital multiplier 1000 of an exemplary embodiment of the present invention. The multiplier 1000 can include a modulus (M) stored in register 1, a multiplicand (A) stored in register 3, a multiplier (B) stored in register 7, a release processor 301, a modulus Processor 300, auxiliary modulus multiple MM I Computational multiplexer (MUX) 10, auxiliary partial product PP I MUX 20 for computation, and accumulator 100 for assisting modulo multiplication computation. The accumulator 100 inputs the partial product value PP I and the modulus multiple value MM I , and produces the result for the Montgomery multiplier. In an exemplary embodiment of the present invention, the positive value M can have n bits (M[n-1:0]). A positive or negative value A can have n+1 bits (A[n:0...

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PUM

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Abstract

A method for power reduction and increasing computation speed for a Montgomery modulus multiplication module for performing modulus multiplication. A coding scheme reduces the hamming distance for partial product and multiple modulus selection, reducing MUX operations and power consumption. Synchronization registers synchronize partial product and multiple modulus values input to an accumulator reducing glitch and / or increase computation speed. Registers provide storage of previous values and reduce the need to obtain the values from a MUX, reducing MUX operations and / or reducing power consumption.

Description

[0001] This application claims priority from Korean Application No. P2003-29445 filed in Korea on May 9, 2003, which is hereby incorporated by reference in its entirety. technical field [0002] The invention relates to the field of cryptographic systems, in particular to a Montgomery modulus multiplier. Background technique [0003] As the use of networked systems increases, the protection of network communications becomes more important. Protection of data integrity and confidentiality becomes an issue. [0004] The basic process of code transmission and decoding a message involves: obtaining the message (plaintext), adapting (encrypting) the plaintext to (ciphertext), sending the ciphertext to the receiver, and demodulating (decrypting) the ciphertext to recover original message. [0005] In a cryptographic system, an encryption key is used to encrypt plaintext. The ciphertext is sent to a receiver, and the receiver decrypts the ciphertext using the decryption key, and...

Claims

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Application Information

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IPC IPC(8): G06F7/52G06F7/72G09C1/00
CPCG06F7/5332G06F7/728G06F2207/3884
Inventor 孙熙宽
Owner SAMSUNG ELECTRONICS CO LTD
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