Method for manufacturing imbedded non-volatile memory with sacrificed layer

Abstract

The invention discloses a method for preparing non-volatile memory in high density such as mask ROM or SONOS memory. The said non-volatile memory and advanced peripheral logic modules are integrated on single chip. The method includes steps: covering gate dielectric layer by a sacrificial layer of silicon nitride; in implantation step, using mask to define pattern of line structure on sacrificial layer of silicon nitride; depositing a dielectric material to fill in gaps in line structure; flattening step to remove sacrificial layer of silicon nitride, and a polycrystalline silicon layer is covered; defining word line in array zone, and defining gate structure of transistor in non array zone; and steps of using low doping drain (LDD), silicide and other logic circuits.

Description

technical field

[0001] The invention relates to a manufacturing method of a non-volatile memory with a small key size, in particular to a manufacturing method suitable for an embedded memory on a complex integrated circuit. Background technique

[0002] With the development of integrated circuit manufacturing technology, the size of components on the integrated circuit is gradually reduced, and the degree of integration of functional blocks on a single chip is also gradually increased. Therefore, many embedded non-volatile memory chips containing logic functional components have been designed, such as memory controllers, general-purpose processors, input / output interface logic, dedicated Logic (dedicated logic), digital signal processors (digital signal processors) and various chips with other functional units.

[0003] At present, there are still some problems to be solved in the design and manufacture of small-sized complex integrated circuits. For example, the smaller t...

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