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Method for preparing transmission electron microscope test piece

An electron microscope and penetrating technology, applied in the manufacture of discharge tubes/lamps, electrode system manufacturing, circuits, etc., can solve the problems of cost increase, barrier layer damage, blurred definition of barrier layer 132 and first substrate 112, etc. problem, achieve the effect of improving accuracy and preventing deformation

Active Publication Date: 2005-07-06
SEMICON MFG INT (SHANGHAI) CORP +1
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  • Abstract
  • Description
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  • Application Information

AI Technical Summary

Problems solved by technology

First, the glue material 116 tends not to completely fill the high aspect ratio voids 122, and void defects 142 are created in the voids 122
Furthermore, during the ion thinning process, these void defects 142 will also cause the barrier layer 132 and even the inner wall of the hole 122 to be damaged due to the lack of protection of the adhesive material 116.
In addition, if the metal material is used instead of the adhesive material 116 to fill the hole 122, in addition to the consideration of cost increase, the metal material will show a high contrast with respect to the barrier layer 132 and the first substrate 112 under the observation of the transmission electron microscope ( contract), this high-contrast state will blur the definition between the barrier layer 132 and the first substrate 112, thereby hindering the observation and measurement of the transmission electron microscope

Method used

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  • Method for preparing transmission electron microscope test piece
  • Method for preparing transmission electron microscope test piece
  • Method for preparing transmission electron microscope test piece

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Embodiment Construction

[0021] Figure 2A is a flow chart of the preparation method of the present invention, Figure 2B Then according to the schematic diagram of the test piece with hole structure prepared according to the preparation method of the present invention, please refer to the following description at the same time Figure 2A as well as Figure 2B . First, the first substrate 112 is provided with a hole 122 , wherein the opening of the hole 122 is located on the sidewall 124 of the first substrate 112 (step 202 ), and the inner wall of the hole 122 has a barrier layer 232 . The barrier layer 232 can be made of titanium nitride (TiN), titanium tungsten (TiW), tantalum nitride (TaN), tantalum tungsten (TaW) or a combination thereof. Then, epoxy adhesive 216 is applied to the sidewall 124 to bond the first substrate 112 and the second substrate 114 (step 204 ).

[0022] Then, ultrasonically vibrate the first substrate 112 and the second substrate 114 (step 205 ). In this preferred embod...

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Abstract

This invention relates to transparent electron microscopes lens process method, which comprises the following steps: providing first baseboard with first hole located on the first sidewall of the first baseboard; then bonding the first sidewall and the second baseboard by glue materials; then supersound shaking the first and second baseboards to make them to the vacuum environment; finally grinding the first and second baseboards to fulfill the process.

Description

technical field [0001] The present invention relates to a method for preparing a transmission electron microscope test piece, and in particular to a method for preparing a test piece with holes of high aspect ratio. Background technique [0002] An integrated circuit is a miniaturization of various electronic components and circuits on a tiny chip. As the integration of integrated circuits increases, tiny chips cannot provide enough area to manufacture the required interconnects, and the design of multiple metal layers has become a necessary process method for many integrated circuits. In the multi-metal layer process, there are so-called contact window and via window process technologies. The contact window is used to directly contact the metal layer wiring and each pole of the transistor component (such as the titanium silicide of the gate) , source / drain doped silicon, etc.), and the via window is used to connect the upper and lower different metal layers. [0003] Usua...

Claims

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Application Information

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IPC IPC(8): H01J9/00H01J37/26
Inventor 张启华李明李日鑫高强
Owner SEMICON MFG INT (SHANGHAI) CORP