Method of enhancing clear field phase shift masks by adding parallel line to phase 0 region
Patent Information
- Authority / Receiving Office
- CN · China
- Current Assignee / Owner
- GLOBALFOUNDRIES U S INC MALTA
- Publication Date
- 2005-11-23
- Estimated Expiration
- Not applicable · inactive patent
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Abstract
Description
technical field
[0001] The present invention relates to integrated circuits and methods of fabrication thereof, and more particularly to generating phase shift patterns to improve patterning of gates, regions, structures, and layers requiring sub-nominal dimensions. Background technique
[0002] A semiconductor device or an integrated circuit may contain a plurality of devices, such as transistors. Ultra-large ULSI may include complementary metal-oxide-semiconductor (CMOS) field-effect transistors (FETs). Although known systems and fabrication allow the fabrication of many IC devices on a single IC, there is still a need to reduce the size of the IC device body, thereby allowing an increase in the number of devices on a single IC.
[0003] One limitation to achieving reduced IC device size is known lithography capabilities. Photolithography is the manufacturing process by which patterns or images are transferred from one medium to another. The known IC photolithography ut...