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Methods of forming metal-insulator-metal (MIM) capacitors with separate seed and main dielectric layers and mim capacitors so formed

A technology of capacitors and metal components, which is applied in the manufacture of electric solid devices, semiconductor devices, semiconductor/solid devices, etc., and can solve problems such as increased capacitor stress, increased leakage current, and increased equivalent oxide thickness of the dielectric layer.

Active Publication Date: 2006-01-18
SAMSUNG ELECTRONICS CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

In addition, the difference in thermal expansion of the electrodes and the dielectric layer may also increase the stress on the capacitor
All of these factors contribute to an increase in the equivalent oxide thickness of the dielectric layer, which in turn contributes to an increase in leakage current

Method used

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  • Methods of forming metal-insulator-metal (MIM) capacitors with separate seed and main dielectric layers and mim capacitors so formed
  • Methods of forming metal-insulator-metal (MIM) capacitors with separate seed and main dielectric layers and mim capacitors so formed
  • Methods of forming metal-insulator-metal (MIM) capacitors with separate seed and main dielectric layers and mim capacitors so formed

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Embodiment Construction

[0032] The invention will be described more fully hereinafter with reference to the accompanying drawings, in which embodiments of the invention are shown. However, the invention is not limited to the embodiments set forth herein. Rather, these embodiments are provided so that this will be thorough and complete, and will fully convey the scope of the invention to those skilled in the art. In the drawings, the thicknesses of layers and regions are exaggerated for clarity. Like numbers identify like elements throughout. As used herein, the term "and / or" includes any and all combinations of one or more of the associated listed items.

[0033] The terms used herein are only for describing the embodiments in detail and are not intended to limit the present invention. As used herein, the singular forms "a, an" and "the" include plural forms unless the context clearly dictates otherwise. It should also be understood that the term "comprising" used in the specification indicates the...

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Abstract

A metal oxynitride seed crystal dielectric layer is formed on a metal nitride lower electrode of a metal-insulator-metal (MIM) type capacitor. The metal oxynitride seed dielectric layer acts as a barrier layer to reduce reaction with the metal nitride bottom electrode during post-processing, eg, for forming metallized upper layers in integrated circuits including MIM type capacitors. The nitrogen contained in the metal oxynitride seed dielectric layer can reduce the type of reactions that occur in conventional type MIM capacitors. The metal oxide main dielectric layer is formed on the metal oxynitride seed dielectric layer and remains independent from the metal oxynitride seed dielectric layer in the MIM capacitor. The metal oxide host dielectric layer is stabilized (eg, using heat treatment or plasma treatment) to eliminate defects (eg, carbon) therein and to adjust the stoichiometry of the metal oxide host dielectric layer.

Description

technical field [0001] This invention relates to the fabrication of integrated circuits, and more particularly to the formation of metal-insulator-metal (MIM) type capacitors. Background technique [0002] As the density of integrated circuits increases, the need to reduce the size of associated capacitors, for example in dynamic random access memories (DRAMs), increases. However, there is also a need to increase the capacitance per unit area of ​​such capacitors, which may be difficult to increase while reducing the overall size of capacitors used in highly integrated circuits. For example, it is known to use SiO in metal-insulator-semiconductor (MIS) capacitors using three-dimensional structures 2 dielectric layer to compensate for the reduced thickness of the dielectric layer. In other words, while reducing the size of the capacitor, the three-dimensional structure is used to increase the effective surface area of ​​the electrodes. However, the above MIS conventional c...

Claims

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Application Information

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IPC IPC(8): H01L21/31H01L21/02H01L21/82H01L29/00H01L27/108H01L27/02H01L21/311H01L21/8242
CPCH01L21/31122B05B11/1011B05B11/1074
Inventor 崔在亨郑正喜金晟泰柳次英金基哲吴世勋崔正植
Owner SAMSUNG ELECTRONICS CO LTD
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