Method for preparing nano phase transformation memory unit capable of reducing write-operation current

A memory cell, nano-phase technology, applied in the field of microelectronics, can solve the problems of high power consumption of devices and large write operation current, and achieve the effect of solving high power consumption of devices

Inactive Publication Date: 2006-03-08
FUDAN UNIV +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

Therefore, the preparation method of the phase-change memory unit provided by the present invention can effecti

Method used

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  • Method for preparing nano phase transformation memory unit capable of reducing write-operation current
  • Method for preparing nano phase transformation memory unit capable of reducing write-operation current
  • Method for preparing nano phase transformation memory unit capable of reducing write-operation current

Examples

Experimental program
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Effect test

Embodiment 1

[0037] The preparation method of the memory cell structure proposed by the present invention is specifically as follows in conjunction with the accompanying drawings:

[0038] a. Choose a low-resistance type (111) silicon wafer, first use acetone to ultrasonically remove the surface organic matter, and then use concentrated H 2 SO 4 :H 2 o 2 : 1:1 heating to 100±10 degrees for about 5 minutes, then rinse and dry with deionized water, then put the silicon wafer into 10:1 water:HF solution for 20±2 seconds to remove surface oxide , then rinse and dry with deionized water, and then put the silicon wafer into NH 4 OH:H 2 o 2 :H 2 O=1:2:5 volume ratio of No. I solution was boiled for 5 minutes, then rinsed with deionized water and dried, and then put the silicon wafer into HCL:H 2 o 2 :H 2 The No. II liquid with a volume ratio of O=1:2:8 was boiled for 10 minutes, then rinsed and dried with deionized water.

[0039] b. Deposit the lower electrode material 2, such as TiN, ...

Embodiment 2

[0048] a. Choose a low-resistance type (111) silicon wafer, first use acetone to ultrasonically remove the surface organic matter, and then use concentrated H 2 SO 4 :H 2 o 2 : 1:1 heating to 100±10 degrees for about 5 minutes, then rinse and dry with deionized water, then put the silicon wafer into 10:1 water:HF solution for 20±2 seconds to remove surface oxide , then rinse and dry with deionized water, and then put the silicon wafer into NH 4 OH:H 2 o 2 :H 2 O=1:2:5 volume ratio of No. I solution was boiled for 5 minutes, then rinsed with deionized water and dried, and then put the silicon wafer into HCL:H 2 o 2 :H 2 The No. II liquid with a volume ratio of O=1:2:8 was boiled for 10 minutes, then rinsed and dried with deionized water.

[0049] b. Deposit the lower electrode material 2 on the cleaned silicon wafer, such as TiN, W, etc.; ( Figure 4b ).

[0050] c. Depositing an Al layer 4 on the lower electrode material; ( Figure 5b ).

[0051] d. Anodized porou...

Embodiment 3

[0057] a. Choose a low-resistance type (111) silicon wafer, first use acetone to ultrasonically remove the surface organic matter, and then use concentrated H 2 SO 4 :H 2 o 2 : 1:1 heating to 100±10 degrees for about 5 minutes, then rinse and dry with deionized water, then put the silicon wafer into 10:1 water:HF solution for 20±2 seconds to remove surface oxide , then rinse and dry with deionized water, and then put the silicon wafer into NH 4 OH:H 2 o 2 :H 2 O=1:2:5 volume ratio of No. I solution was boiled for 5 minutes, then rinsed with deionized water and dried, and then put the silicon wafer into HCL:H 2 o 2 :H 2 The No. II liquid with a volume ratio of O=1:2:8 was boiled for 10 minutes, then rinsed and dried with deionized water.

[0058] b. Deposit the lower electrode material 2 on the cleaned silicon wafer, such as TiN, W, etc.; ( Figure 4b ).

[0059] c. Depositing an Al layer 4 on the lower electrode material; ( Figure 5b ).

[0060] d. Anodized porou...

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Abstract

Forming porous medium through self-organization or controlled technological process, the disclosed method constructs Nano phase change storage unit based on the medium in order to reach purpose of limiting heat, electricity and reducing contact area of electrode. Features of the phase change storage are: small current of write operation, high rate of heat utilization, small power consumption, quick speed of response. Thus, relevant performance of device is raised.

Description

technical field [0001] The invention belongs to the technical field of microelectronics, and in particular relates to a manufacturing method of a phase-change memory unit for reducing a write operation current. Background technique [0002] Memory occupies an important position in the semiconductor market. Only DRAM (Dynamnic Random Access Memory) and FLASH occupy 15% of the entire market. With the gradual popularization of portable electronic devices, the market for non-volatile memory is also growing. At present FLASHh occupies the mainstream of non-volatile memory, accounting for about 90%. However, with the advancement of semiconductor technology, FLASH has encountered more and more technical bottlenecks. First, the floating gate for storing charges cannot be thinned indefinitely with the development of integrated circuit technology. In addition, other shortcomings of FLASH technology also limit Its application, such as data writing is slow, high voltage is required whe...

Claims

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Application Information

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IPC IPC(8): H01L21/70H01L27/24H01L45/00G11C11/56
Inventor 吕杭炳林殷茵汤庭鳌陈邦明
Owner FUDAN UNIV
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