Low voltage difference linear voltage stabilizer circuit

A low-dropout linear and voltage regulator technology, applied in instruments, regulating electrical variables, control/regulating systems, etc., can solve problems such as increasing sampling resistor current and increasing system power consumption, reducing output noise and improving PSRR. Effect

Inactive Publication Date: 2006-08-30
CHIPHOMER TECH SHANGHAI
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  • Abstract
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Problems solved by technology

[0012] 2. Reducing the sampling resistor in the voltage dividing sampling network 104 can reduce the noise generated by the resistor itself, but reducing the noise will increase the current on the sampling resistor and increase the power consumption of the entire system

Method used

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  • Low voltage difference linear voltage stabilizer circuit
  • Low voltage difference linear voltage stabilizer circuit
  • Low voltage difference linear voltage stabilizer circuit

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Embodiment Construction

[0028] like figure 2As shown, the LDO circuit of the present invention is composed of a reference voltage 201 , an error amplifier EA 102 , an output power transistor MPX 103 , a load 105 and an RC filter circuit 106 . Compared with the traditional LDO circuit, the LDO circuit of the present invention cancels the voltage dividing sampling network, and the error amplifier EA 102 and the output power tube MPX 103 constitute a unit gain follower. This structure cancels the sampling resistor in the voltage dividing sampling network resulting thermal noise. At the same time, since the amplification factor of the follower is 1, the input reference noise at the input end of the error amplifier EA 102 and the interference signal of the power supply will not be amplified at the output end. Therefore, the noise generated by the LDO circuit proposed by the present invention is much smaller than that generated by the traditional LDO circuit, and at the same time, the PSRR of the entire ...

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Abstract

The invention relates to a low voltage linear voltage stabilizer circuit that includes reference voltage circuit, error amplifier, and power output tube and load circuit. The feather is that the output end of load circuit directly connects to the power output tube and feedback to the input positive end of error amplifier. The invention could decrease output noise and improve PSRR. The invention generates a current that is direct ratio to temperature. It could compensate the temperature coefficient of resistance to gain a reference voltage that would not alter following the alteration of resistance. The invention could generate agility alterable reference voltage.

Description

technical field [0001] The invention relates to analog integrated circuit technology, in particular to a low-dropout linear regulator circuit for reducing output noise and improving power supply rejection ratio. Background technique [0002] Low dropout linear regulator (LDO, Low Dropout Regulator) is an important branch of power supply IC, and DC-DC based on the principles of pulse width modulation (PWM, Pulse Width Modulation) and pulse frequency modulation (PFM, Pulse Frequency Modulation) Compared with converters, it has the advantages of low cost, low noise, small quiescent current and no need for inductors. In portable electronic products, LDO is often used as the power supply of the system. [0003] figure 1 It is a basic LDO circuit, which is composed of a reference voltage 101 , an error amplifier 102 , an output power transistor 103 , a voltage dividing sampling network 104 and a load 105 . [0004] The reference voltage 101 module generates a reference voltage t...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G05F3/26
Inventor 史亚军孙洪军吴珂
Owner CHIPHOMER TECH SHANGHAI
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