High-speed coding method of low density check code

A coding and high-speed technology, applied in the field of communication, can solve the problems of increasing the complexity of LDPC encoders, limiting the application of LDPC codes, and difficult engineering implementation, etc., to achieve the effect of solving data throughput, reducing system overhead, and low system overhead

Inactive Publication Date: 2006-11-15
UNIV OF ELECTRONICS SCI & TECH OF CHINA
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Problems solved by technology

However, with the increase of the code length, the complexity of the LDPC coder will also increase greatly, and the overhead will increase greatly, which is difficult to realize in engineering, which greatly limits the application of LDPC codes.

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  • High-speed coding method of low density check code
  • High-speed coding method of low density check code
  • High-speed coding method of low density check code

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Embodiment Construction

[0048] The LDPC encoder used in the digital baseband transmission part in the B3G TDD mode downlink design can adopt the LDPC encoding method in the present invention. In the design, SDRAM is used to store the data source matrix A (the dimension is 64×(32×76)) and the generation matrix B (the dimension is (32×76)×(8×483)), and the Vertex II Pro of Xilinx Company is used Chip Xc2vp70 implements the LDPC encoder in the present invention. After verification, when the system clock works at 80MHZ, the LDPC encoder can complete the encoding of 1664 code blocks (the length of each code block is 2404) within one TTI=40ms, and the system data throughput reaches 100Mbps .

[0049] Therefore, the LDPC encoding method of the present invention can store the data source matrix and the generation matrix by using memory such as SDRAM, and cooperate with FPGA to realize the LDPC encoder. The LDPC encoder has the characteristics of fast operation speed, low system overhead and excellent perfo...

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Abstract

The invention discloses the low dense checkout code high speed coding method, by the partition of the date source matrix and the building matrix, the multiplication operation between the date source matrix A and the building matrix B can be transformed into the multiplication operation between the n son matrix with the (m*a) dimensions of the matrix A and the nxc son matrix with the (axb) dimensions of the matrix B. The invention relates to the LDPC coding method, the LDPC coding setting can be realized cooperated with the FPGA by using the memorizer saving data source matrix and the building matrix such as the SDRAM. The realized LDPC coding setting has many merits such as the high operating speed, the low spending of the system and the good ability. Compared with the conventional LDPC coding method, the invention has the better project realizing ability and the quicker coding speed. The invention can avoids the speed bottleneck problem of the storage to improve the realizing ability of the LDPC coding setting when the large matrix multiplying.

Description

Technical field: [0001] The invention belongs to the field of communication, and in particular relates to the design and engineering realization technology of channel LDPC coder in communication. Background technique: [0002] Low Density Check Code (abbreviation: LDPC) is an error correction coding method that has received widespread attention in communication. In 1962, Gallager proposed a linear code based on a sparse parity check matrix, that is, a low-density parity check code (Low-Density Parity-Check Code, LDPC), which proved that LDPC is a good code. But despite its good performance, LDPC codes did not attract enough attention before the appearance of Turbo codes. Until recently, LDPC codes were used in AWGN and Rayleigh fading channels due to their performance close to the Shannon limit. It has been proved that LDPC codes greatly exceed the performance of convolutional coding when the code length of LDPC codes is large. However, with the increase of the code lengt...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H03M13/11H04L1/00
Inventor 刘皓武文杰何旭李少谦
Owner UNIV OF ELECTRONICS SCI & TECH OF CHINA
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