Method for eliminating dc bias for receiver and signal process module

A signal processing module and DC bias technology, applied in the field of receivers, can solve the problem of not being able to simply and accurately eliminate the DC bias of the signal processing module, and achieve the effects of low implementation cost, simple algorithm structure and high computational efficiency

Inactive Publication Date: 2007-02-21
GLOBAL INNOVATION AGGREGATORS LLC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0005] The invention provides a method for eliminating DC offset of a receiver and its signal processing module, which is used to solve the problem in the prior art that the DC offset of the signal processing module in the receiver cannot be eliminated simply and accurately

Method used

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  • Method for eliminating dc bias for receiver and signal process module
  • Method for eliminating dc bias for receiver and signal process module
  • Method for eliminating dc bias for receiver and signal process module

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Embodiment Construction

[0040] The core idea of ​​the present invention is that the method for eliminating the DC bias of the signal processing module in the receiver is as follows: figure 2 shown, including the following steps:

[0041] Step S101, monitoring the state of the logical channel in each time slot, and cutting off the received signal of the signal processing module in an idle time slot;

[0042] Step S102, calculating the DC bias value of the signal processing module according to the sampling signal output by the signal processing module in the idle time slot;

[0043] Step S103, eliminating the DC offset of the sampling signals output by the signal processing modules of subsequent time slots according to the DC offset value.

[0044] The present invention will be further described below in conjunction with the embodiments and the accompanying drawings.

[0045]The connection relationship between the signal processing module in the receiver of this embodiment and the control module 100...

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Abstract

The invention is used to solve the problem of which the DC bias can not be simply and accurately removed from the signal processor in the receiver. It comprises the following steps: the control module supervises the state of each time slot in the logic channel, informs the idle time slot to the calculation module and disconnects the receiving signal of the signal processor in the idle time slot; according to the sampling signal outputted from the signal processor in the idle time slot, the calculation module calculates the DC bias value of the signal processor and outputs the result to the bias removing module; according to said DC bias value, the bias removing module removes the DC bias of the sampling signals from the signal processor.

Description

technical field [0001] The invention relates to the field of receivers, in particular to a receiver and a method for eliminating direct current offset of a signal processing module thereof. Background technique [0002] Superheterodyne receivers are widely used in GSM (Global System for Mobile Communication, Global System for Mobile Communication) base station equipment due to their excellent performance and low cost. The superheterodyne receiver requires two stages of down-conversion. Compared with single down-conversion, this kind of double down-conversion relaxes the performance requirements of the filter; because the first-stage down-conversion reduces the signal frequency, the IF processing can completely use digital and analog. Hybrid integrated circuit implementation has great advantages in cost. In the process of simulating quadrature down-conversion of intermediate frequency signals, such as figure 1 As shown, the local oscillator signal provided by the local osci...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H04B1/26H04B1/06H04B1/10H03D7/16
Inventor 方坤鹏
Owner GLOBAL INNOVATION AGGREGATORS LLC
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